3306 Commits

Author SHA1 Message Date
Hamish Ivey-Law
83c0292be8
Move SHL and SHR generation to the CPU. (#878) 2023-02-09 05:44:05 +11:00
Hamish Ivey-Law
69228491d8
Unify generation and verification of ADD/SUB/LT/GT operations (#872)
* Unify handling of ADD, SUB, LT, GT under the formula x+y=z+cy*2^256.

* Rename general column ranges to "registers" instead of "inputs".

* Rename 'compare' module to 'addcc'.

* Update comments.

* Enforce length equality in iteration.

* Address William's PR comments.
2023-02-07 23:52:58 +11:00
wborgeaud
ca002aeafa
Optimize ecrecover ASM (#840)
* windowed mul

* Working

* Window of 4 bits

* Fix

* Comments

* Unroll loop

* Unroll loop

* remove global

* Minor

* Minor

* Implement `CALLVALUE, CALLDATALOAD, CALLDATASIZE, CALLDATACOPY` in interpreter

* Minor

* Doesn't work

* Minor

* Minor

* wnaf msm

* Working hardcoded values: 28657 opcodes

* Working wnaf

* Small wnaf optim

* Precompute works

* Working together

* Bump to 129 bits

* Working glv decomposition

* Working MSM with GLV

* Almost working

* Working

* ECC test folder

* Working with real sig data

* Fix tests + Clippy

* Minor

* Cleaning

* Comments

* Cleaning

* Smaller glv test file

* Print opcode count at the end of interpreter run

* More constants

* Add z3 proof that the GLV scalars are 129-bit or less

* Minor change to z3 proof

* Minor

* Hamish's suggestion

* Working

* Cleaning

* Clippy

* PR feedback

* Minor PR feedback
2023-01-31 19:23:54 +01:00
Daniel Lubarov
9990632f48
Merge pull request #870 from mir-protocol/prep_for_publish
Prep for publishing to crates.io
2023-01-30 13:50:51 -08:00
Daniel Lubarov
137bc78565 Prep for publishing to crates.io 2023-01-30 13:18:06 -08:00
Daniel Lubarov
815113809a TODO 2023-01-30 08:43:52 -08:00
Hamish Ivey-Law
6c4ef29fec
Add range checks to the arithmetic Stark (#866)
* Simplify loop and remove clippy.

* Offset auxiliary coefficients so they're always positive.

* Split mul aux input into lo/hi parts.

* Rename register.

* Combine `QUO_INPUT_{LO,HI}`; rearrange some columns.

* Split `MODULAR_AUX_INPUT` into high and low pieces.

* Remove range_check_error debug output.

* First draft of generating the range checks.

* Remove opcodes for operations that were defined elsewhere.

* Clean up interface to build arithmetic trace.

* Fix "degree too high" bug in DIV by zero.

* Fix constraint_transition usage in recursive compare.

* Fix variable name; use named constant.

* Fix comment values.

* Fix bug in recursive MUL circuit.

* Superficial improvements; remove unnecessary genericity.

* Fix bug in recursive MULMOD circuit.

* Remove debugging noise; expand test.

* Minor comment.

* Enforce assumption in assert.

* Make DIV its own operation.

* Make MOD it's own operation; rename structs; refactor.

* Expand basic test.

* Remove comment.

* Put Stark operations in their own file.

* Test long traces.

* Minor comment.

* Address William's comments.

* Use `const_assert!` instead of `debug_assert!` because Clippy.
2023-01-31 02:23:24 +11:00
wborgeaud
136cdd053f
Remove InterpolationGate trait (#868) 2023-01-25 08:29:51 +01:00
Jim Posen
3bdb290746
Optimized interpolation gate (#861)
* New implementation of InterpolationGate

* Use CosetInterpolationGate in recursive verifier

* Minimize the degree of interpolation gate

Minimize the degree if it doesn't increase the number of wires or constraints. This allows for more efficiency with selectors.

* Include tests for number of wires and constraints

* Run rustfmt

* Run cargo fmt

* Fix documentation typo

Co-authored-by: wborgeaud <williamborgeaud@gmail.com>

* Fix clippy issue

Co-authored-by: wborgeaud <williamborgeaud@gmail.com>
2023-01-24 11:12:41 +01:00
Daniel Lubarov
8ae3647473
Merge pull request #865 from mir-protocol/increment_nonce
Increment sender nonce + buy gas
2023-01-18 14:43:48 -08:00
Daniel Lubarov
f2e40541d9 Increment sender nonce + buy gas 2023-01-17 23:57:53 -08:00
Daniel Lubarov
b753836a37
Merge pull request #864 from mir-protocol/block_circuit
Block circuit
2023-01-15 22:51:24 -08:00
Daniel Lubarov
b6f6c21018 Block circuit 2023-01-15 00:06:08 -08:00
Daniel Lubarov
3a6d693f3f
Merge pull request #863 from mir-protocol/smart_contract_test
Basic smart contract test
2023-01-14 21:42:20 -08:00
Daniel Lubarov
a2f4a58d9a log 2023-01-14 21:21:47 -08:00
Daniel Lubarov
df2ba7a384 Basic smart contract test 2023-01-14 21:18:58 -08:00
Nicholas Ward
07e02f2df1
Merge pull request #862 from mir-protocol/prover_inputs_error_handling
Use error instead of panicking in `FromStr`
2023-01-13 16:39:31 -08:00
wborgeaud
a158effe4d Use error instead of panicking in FromStr 2023-01-13 15:26:53 +01:00
Daniel Lubarov
be7a489c6e Fix stack overflow 2023-01-10 21:03:46 -08:00
Daniel Lubarov
8ba8bb62f2
Merge pull request #860 from mir-protocol/agg_circuit_2
Add aggregation circuit
2023-01-04 14:57:56 -08:00
Daniel Lubarov
87be6097a1 Feedback 2023-01-04 14:50:15 -08:00
Daniel Lubarov
ae212cfbbd
Merge pull request #859 from mir-protocol/remove_older_evm_recursion_logic
Remove some older EVM recursion logic
2023-01-04 00:07:15 -08:00
Daniel Lubarov
14e6e7e968
Merge pull request #858 from mir-protocol/remove_ctl_defaults
Remove CTL defaults
2023-01-03 23:32:41 -08:00
Daniel Lubarov
e4a5c2c968
Merge pull request #857 from mir-protocol/non_tight_degree_bound
Allow non-tight degree bound
2023-01-03 22:29:45 -08:00
Daniel Lubarov
f4ac2d4f9c Fix vk 2023-01-03 17:45:47 -08:00
Daniel Lubarov
5df784416a Add aggregation circuit
Which can be used to compress two proofs into one. Each inner proof can be either
- an "EVM root" proof (which typically proves one transaction, though it could be 0 or more)
- another aggregation proof
2023-01-03 15:46:59 -08:00
Daniel Lubarov
76b3eb304c more 2023-01-03 12:43:05 -08:00
Daniel Lubarov
fbb72e16bb warning 2023-01-03 12:29:14 -08:00
Daniel Lubarov
e12c6ad5b9 Remove some older EVM recursion logic
Some logic was replaced by the constant-degree logic in `fixed_recursive_verifier`.
2023-01-03 11:53:21 -08:00
Daniel Lubarov
6655e776a8 Remove CTL defaults
We ended up not needing the feature.
2023-01-03 11:36:42 -08:00
Daniel Lubarov
0ca308400a
Merge pull request #855 from mir-protocol/fixed_stark_recursion
Shrink STARK proofs to a constant degree
2023-01-03 11:31:14 -08:00
Daniel Lubarov
5719c0b70b feedback 2023-01-03 11:23:28 -08:00
Daniel Lubarov
1ecdb96a6b Power of two length 2023-01-03 11:03:20 -08:00
Daniel Lubarov
2e59ceccc4 import 2023-01-03 10:40:05 -08:00
Daniel Lubarov
40aecc8e95 Allow non-tight degree bound
Reverts the degree adjustment part of #436. As @jimpo pointed out, the adjustment complicates security by allowing rational functions of the form `poly(x) / x`.

A tight degree bound shouldn't be necessary. Ultimately we want to check that some witness function `f(x)` exists satisfying (simplified) `c(f(x)) = Z_H(x) q(x)`.  We only need `f(x)` to be low-degree because that allows us to use polynomial identity testing. With PIT we don't care about exact degree bounds; a negligible degree change will have a negligible effect on PIT soundness.
2023-01-03 10:19:55 -08:00
Daniel Lubarov
18ce7ea547 Disable slow test on CI 2023-01-01 23:42:05 -08:00
Daniel Lubarov
595e751ac1 Shrink STARK proofs to a constant degree
The goal here is to end up with a single "root" circuit representing any EVM proof. I.e. it must verify each STARK, but be general enough to work with any combination of STARK sizes (within some range of sizes that we chose to support). This root circuit can then be plugged into our aggregation circuit.

In particular, for each STARK, and for each initial `degree_bits` (within a range that we choose to support), this adds a "shrinking chain" of circuits. Such a chain shrinks a STARK proof from that initial `degree_bits` down to a constant, `THRESHOLD_DEGREE_BITS`.

The root circuit then combines these shrunk-to-constant proofs for each table. It's similar to `RecursiveAllProof::verify_circuit`; I adapted the code from there and I think we can remove it after. The main difference is that now instead of having one verification key per STARK, we have several possible VKs, one per initial `degree_bits`. We bake the list of possible VKs into the root circuit, and have the prover indicate the index of the VK they're actually using.

This also partially removes the default feature of CTLs. So far we've used filters instead of defaults. Until now it was easy to keep supporting defaults just in case, but here maintaining support would require some more work. E.g. we couldn't use `exp_u64` any more, since the size delta is now dynamic, it can't be hardcoded. If there are no concerns, I'll fully remove the feature after.
2023-01-01 23:11:39 -08:00
Daniel Lubarov
32cda2136b
Merge pull request #854 from Sladuca/bool-or-gadget
add `or` gadget for `BoolTarget`
2022-12-28 19:40:28 -08:00
Sladuca
403e239250
use doc comment 2022-12-28 12:20:08 -05:00
Sladuca
350b902998
add or gadget 2022-12-28 11:30:24 -05:00
Daniel Lubarov
d90a055929
Merge pull request #853 from mir-protocol/ctl_fixes
Fix logic and Keccak CTLs
2022-12-19 17:30:27 -08:00
Daniel Lubarov
b8e97aaaf8 Fix logic and Keccak CTLs
Lots of little bugs!

- The Keccak sponge table's padding logic was wrong, it was mixing up the number of rows with the number of hashes.
- The Keccak sponge table's Keccak-looking data was wrong - input to Keccak-f should be after xor'ing in the block.
- The Keccak sponge table's logic-looking filter was wrong. We do 5 logic CTLs for any final-block row, even if some of the xors are with 0s from Keccak padding.
- The CPU was using the wrong/outdated output memory channel for its Keccak sponge and logic CTLs.
- The Keccak table just didn't have a way to filter out padding rows. I added a filter column for this.
- The Keccak table wasn't remembering the original preimage of a permutation; lookers were seeing the preimage of the final step. I added columns for the original preimage.
- `ctl_data_logic` was using the wrong memory channel
- Kernel bootloading generation was using the wrong length for its Keccak sponge CTL, and its `keccak_sponge_log` was seeing the wrong clock since it was called after adding the final bootloading row.
2022-12-19 15:42:59 -08:00
Dima V
4112a24093
Merge pull request #851 from mir-protocol/bn_base_in_interpreter
Use the order of the BN254 base field in the interpreter
2022-12-14 16:25:22 -08:00
wborgeaud
9d6b3b2d16 Ignore failing test 2022-12-14 17:34:22 +01:00
wborgeaud
83a290331e Fixes 2022-12-14 16:34:32 +01:00
wborgeaud
f91dfe7e1a Use the order of the BN base field in the interpreter 2022-12-14 16:22:57 +01:00
Nicholas Ward
806b88d7d6
Merge pull request #831 from mir-protocol/blake
Blake2b hash function ASM
2022-12-13 15:07:24 -08:00
Nicholas Ward
6ab6580058 block_size macro 2022-12-13 14:42:45 -08:00
Nicholas Ward
f3937e9977 deps fix 2022-12-13 10:29:03 -08:00
Nicholas Ward
53004867b3 macro 2022-12-13 10:08:36 -08:00