36 Commits

Author SHA1 Message Date
Dmitry Vagner
143225f449 finish 2023-03-21 19:19:02 -07:00
Dmitry Vagner
2158c1d267 merge 2023-02-13 11:31:08 -08:00
Hamish Ivey-Law
40866e775a
Refactor arithmetic operation traits (#876)
* Use U256s in `generate(...)` interfaces; fix reduction bug modular.

* Refactor `Operation` trait.

* Rename file.

* Rename `add_cc` things to `addcy`.

* Clippy.

* Simplify generation of less-than and greater-than.

* Add some comparison tests.

* Use `PrimeField64` instead of `RichField` where possible.

* Connect `SUBMOD` operation to witness generator.

* Add clippy exception.

* Add missing verification of range counter column.

* Fix generation of RANGE_COUNTER column.

* Address William's PR comments.
2023-02-10 23:07:57 +11:00
Dmitry Vagner
c6492bc5d5 merge fix 2023-02-08 11:28:52 -08:00
Dmitry Vagner
7b367f5c49 merge 2023-02-08 11:25:11 -08:00
Hamish Ivey-Law
83c0292be8
Move SHL and SHR generation to the CPU. (#878) 2023-02-09 05:44:05 +11:00
Dmitry Vagner
e63cc2aa9b Merge branch 'main' of github.com:mir-protocol/plonky2 into non-inv 2023-02-07 08:53:43 -08:00
Hamish Ivey-Law
69228491d8
Unify generation and verification of ADD/SUB/LT/GT operations (#872)
* Unify handling of ADD, SUB, LT, GT under the formula x+y=z+cy*2^256.

* Rename general column ranges to "registers" instead of "inputs".

* Rename 'compare' module to 'addcc'.

* Update comments.

* Enforce length equality in iteration.

* Address William's PR comments.
2023-02-07 23:52:58 +11:00
Dmitry Vagner
cd5c92b574 merge 2023-02-01 08:51:42 -08:00
Hamish Ivey-Law
6c4ef29fec
Add range checks to the arithmetic Stark (#866)
* Simplify loop and remove clippy.

* Offset auxiliary coefficients so they're always positive.

* Split mul aux input into lo/hi parts.

* Rename register.

* Combine `QUO_INPUT_{LO,HI}`; rearrange some columns.

* Split `MODULAR_AUX_INPUT` into high and low pieces.

* Remove range_check_error debug output.

* First draft of generating the range checks.

* Remove opcodes for operations that were defined elsewhere.

* Clean up interface to build arithmetic trace.

* Fix "degree too high" bug in DIV by zero.

* Fix constraint_transition usage in recursive compare.

* Fix variable name; use named constant.

* Fix comment values.

* Fix bug in recursive MUL circuit.

* Superficial improvements; remove unnecessary genericity.

* Fix bug in recursive MULMOD circuit.

* Remove debugging noise; expand test.

* Minor comment.

* Enforce assumption in assert.

* Make DIV its own operation.

* Make MOD it's own operation; rename structs; refactor.

* Expand basic test.

* Remove comment.

* Put Stark operations in their own file.

* Test long traces.

* Minor comment.

* Address William's comments.

* Use `const_assert!` instead of `debug_assert!` because Clippy.
2023-01-31 02:23:24 +11:00
Dmitry Vagner
31c5db91a5 rename module 2023-01-17 16:11:15 +07:00
Dmitry Vagner
cca75c7713 remove redundant definition 2022-12-27 18:42:34 -08:00
Daniel Lubarov
1303a83f7f Misc witness generation fixes 2022-12-03 21:09:57 -08:00
Daniel Lubarov
520bb5a8cd
Merge pull request #816 from mir-protocol/jacqui/witness-generation
WIP: witness generation
2022-12-02 20:11:09 -08:00
Daniel Lubarov
7293054062 Warnings 2022-12-02 14:49:32 -08:00
Hamish Ivey-Law
ce786c7a9c
Halve number of columns used by arithmetic table (#813)
* Add comments about number of columns used.

* Split modular operations across two rows.

* Fix test setup.

* Use constraint_transition() in common code.

* Ensure all inputs/outputs are on the first row.

* Fix constraint for single-row ops.

* Tidy up loop; make MODULAR_AUX_INPUT length reflect reality.
2022-12-02 17:11:31 +11:00
Daniel Lubarov
b6326c56b2 stubs 2022-11-30 22:03:00 -08:00
Daniel Lubarov
ea0e37480d misc 2022-11-30 21:56:59 -08:00
Daniel Lubarov
526dc9bb77 Flush out operation list 2022-11-30 21:00:48 -08:00
Daniel Lubarov
97ac5c59d6 Fixes 2022-11-30 18:12:31 -08:00
Daniel Lubarov
906a47a1ef generate_push and misc other progress 2022-11-30 17:45:31 -08:00
Daniel Lubarov
2471f5a391 Push and arithmetic ops 2022-11-30 15:25:16 -08:00
Brandon H. Gomes
812a5d468a
chore: merge branch main
Signed-off-by: Brandon H. Gomes <bhgomes@pm.me>
2022-11-15 01:54:30 -05:00
Brandon H. Gomes
14c2a6dd1f
Fork Update (#3)
* Use static `KERNEL` in tests

* Print opcode count

* Update criterion

* Combine all syscalls into one flag (#802)

* Combine all syscalls into one flag

* Minor: typo

* Daniel PR comments

* Check that `le_sum` won't overflow

* security notes

* Test reverse_index_bits

Thanks to Least Authority for this

* clippy

* EVM shift left/right operations (#801)

* First parts of shift implementation.

* Disable range check errors.

* Tidy up ASM.

* Update comments; fix some .sum() expressions.

* First full draft of shift left/right.

* Missed a +1.

* Clippy.

* Address Jacqui's comments.

* Add comment.

* Fix missing filter.

* Address second round of comments from Jacqui.

* Remove signed operation placeholders from arithmetic table. (#812)

Co-authored-by: wborgeaud <williamborgeaud@gmail.com>
Co-authored-by: Daniel Lubarov <daniel@lubarov.com>
Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>
Co-authored-by: Hamish Ivey-Law <426294+unzvfu@users.noreply.github.com>
2022-11-15 01:51:29 -05:00
Brandon H. Gomes
e2cdd5a954
feat: upgrade Sampling APIs
Signed-off-by: Brandon H. Gomes <bhgomes@pm.me>
2022-11-03 08:26:03 -07:00
Brandon H. Gomes
6fd0da216a
fix: remove unstable features from plonky2
Signed-off-by: Brandon H. Gomes <bhgomes@pm.me>
2022-11-02 17:50:31 -07:00
Hamish Ivey-Law
4af2ede6e6
Implement DIV instruction (#790)
* Implement DIV instruction.

* cargo fmt, clippy, minor doc update.

* Add implementation of circuit version.
2022-10-21 16:25:38 +11:00
Hamish Ivey-Law
f55e07659c
Implement SUBMOD instruction (#789)
* Implement SUBMOD instruction.

* Implement recursive circuit version of SUBMOD.
2022-10-20 04:46:01 +11:00
Hamish Ivey-Law
68a5428500
Represent input columns as ranges rather than arrays (#776)
* Use std::ops::Range of columns rather than arrays of column indices.

* Refactor reading from the local values table.

* The inevitable post-push fmt/clippy commit.
2022-10-12 02:39:13 +11:00
Hamish Ivey-Law
0d0067554e
Refactor and tidy up mul.rs (#764)
* Refactor and tidy up `mul.rs`.

* Jacqui PR comments.
2022-10-11 18:59:02 +11:00
Hamish Ivey-Law
d7bb47318c
Modular operations for the EVM arithmetic unit (#755)
* First draft of 256-bit addition.

* Update comment.

* cargo fmt

* Rename addition evaluation file.

* Port ALU logic from SZ.

* Give a name to some magic numbers.

* `addition.rs` -> `add.rs`; fix carry propagation in add; impl sub.

* Clippy.

* Combine hi and lo parts of the output.

* Implement MUL.

* Suppress Clippy's attempt to make my code even harder to read.

* Next draft of MUL.

* Make all limbs (i.e. input and output) 16-bits.

* Tidying.

* Use iterators instead of building arrays.

* Documentation.

* Clippy is wrong; also cargo fmt.

* Un-refactor equality checking, since it was wrong for sub.

* Daniel comments.

* Daniel comments.

* Rename folder 'alu' -> 'arithmetic'.

* Rename file.

* Finish changing name ALU -> Arithmetic Unit.

* Finish removing dependency on array_zip feature.

* Remove operations that will be handled elsewhere.

* Rename var; tidy up.

* Clean up columns; mark places where range-checks need to be done.

* Import all names in 'columns' to reduce verbiage.

* cargo fmt

* Fix aux_in calculation in mul.

* Remove redundant 'allow's; more precise range-check size.

* Document functions.

* Document MUL instruction verification technique.

* Initial tests for ADD.

* Minor test fixes; add test for SUB.

* Fix bugs in generate functions.

* Fix SUB verification; refactor equality verification.

* cargo fmt

* Add test for MUL and fix some bugs.

* Update doc.

* Quiet incorrect clippy error.

* Initial implementation of ADDMOD and MOD.

* Fixes to addmod.

* Update doc.

* Do 1000 random tests instead of just 1.

* Documentation fix.

* Working version of ADDMOD.

* Working version of MOD.

* Name magic number; do multiple MUL tests.

* Add code and test for special case; add some docs.

* Fix spelling mistake.

* Simplify asserts.

* Tidy comment.

* Remove unused module.

* cargo fmt

* Check that output is reduced.

* Add conversion of canonical `i64` to a `Field64`.

* Handle zero modulus within degree constraint.

* cargo fmt

* Fix some comments.

* Check that the top half of the product is zero!

* Start of refactor.

* Refactoring.

* Remove zero and reduction handling from addmod.

* Refactoring; renaming; bug fixes.

* Reuse intermediate calculations across all modular operations; don't negate quot poly unnecessarily.

* Fix bug where last elt of q*m wasn't checked.

* Refactoring.

* Move circuit poly functions to utils.rs.

* Rename ADDMOD stuff to MODULAR.

* Rename module addmod -> modular.

* Handle zero modulus.

* Verify that output is reduced.

* Implement recursive version of modular circuits.

* clippy

* Tidy up i64 -> Field conversion following Jacqui's comments.

* cargo fmt

* Improved documentation.

* Address Jacqui's comments.

* Save some gates by using builder.arithmetic_extension().
2022-10-07 17:15:50 +11:00
Jacqueline Nabaglo
9d1d179eb1
Verify that comparison output is zero or one (#715) 2022-09-17 10:47:55 -07:00
Daniel Lubarov
aae9e49e90
Merge pull request #696 from mir-protocol/public_memory
Public memory, part 1
2022-08-25 23:48:01 -07:00
Daniel Lubarov
aa87f2c3ba Public memory 2022-08-25 20:19:18 -07:00
Hamish Ivey-Law
50c9638b55
EVM arithmetic unit: unsigned comparisons (#688)
* Refactor u256 calculation; return cy/br from calculations.

* Implement less than and greater than operations.

* Add file documentation.
2022-08-26 09:13:47 +10:00
Hamish Ivey-Law
aa42312126
EVM Arithmetic Stark table (#559)
* First draft of 256-bit addition.

* Update comment.

* cargo fmt

* Rename addition evaluation file.

* Port ALU logic from SZ.

* Give a name to some magic numbers.

* `addition.rs` -> `add.rs`; fix carry propagation in add; impl sub.

* Clippy.

* Combine hi and lo parts of the output.

* Implement MUL.

* Suppress Clippy's attempt to make my code even harder to read.

* Next draft of MUL.

* Make all limbs (i.e. input and output) 16-bits.

* Tidying.

* Use iterators instead of building arrays.

* Documentation.

* Clippy is wrong; also cargo fmt.

* Un-refactor equality checking, since it was wrong for sub.

* Daniel comments.

* Daniel comments.

* Rename folder 'alu' -> 'arithmetic'.

* Rename file.

* Finish changing name ALU -> Arithmetic Unit.

* Finish removing dependency on array_zip feature.

* Remove operations that will be handled elsewhere.

* Rename var; tidy up.

* Clean up columns; mark places where range-checks need to be done.

* Import all names in 'columns' to reduce verbiage.

* cargo fmt

* Fix aux_in calculation in mul.

* Remove redundant 'allow's; more precise range-check size.

* Document functions.

* Document MUL instruction verification technique.

* Initial tests for ADD.

* Minor test fixes; add test for SUB.

* Fix bugs in generate functions.

* Fix SUB verification; refactor equality verification.

* cargo fmt

* Add test for MUL and fix some bugs.

* Update doc.

* Quiet incorrect clippy error.

* Clean up 'decode.rs'.

* Fold 'decode.rs' into 'arithmetic_stark.rs'.

* Force limb size to divide EVM register size.

* Document range-check warning and fix end value calc.

* Convert `debug_assert!`s into `assert!`s.

* Clean up various kinds of iterator usage.

* Remove unnecessary type spec.

* Document unexpected use of `collect`.
2022-06-29 11:56:48 +10:00