11 Commits

Author SHA1 Message Date
Robin Salen
0d97b93af5
Add some documentation in EVM crate (#1295)
Co-authored-by: Linda Guiga <linda.guiga@toposware.com>
2023-10-30 14:28:24 -04:00
Hamish Ivey-Law
c134b59763
Cross-table lookup for arithmetic stark (#905)
* First draft of linking arithmetic Stark into the CTL mechanism.

* Handle {ADD,SUB,MUL}FP254 operations explicitly in `modular.rs`.

* Adjust argument order; add tests.

* Add CTLs for ADD, MUL, SUB, LT and GT.

* Add CTLs for {ADD,MUL,SUB}MOD, DIV and MOD.

* Add CTLs for {ADD,MUL,SUB}FP254 operations.

* Refactor the CPU/arithmetic CTL mapping; add some documentation.

* Minor comment fixes.

* Combine addcy CTLs at the expense of repeated constraint evaluation.

* Combine addcy CTLs at the expense of repeated constraint evaluation.

* Merge `*FP254` CTL into main CTL; rename some registers.

* Connect extra argument from CPU in binary ops to facilitate combining with ternary ops.

* Merge modular ops CTL into main CTL.

* Refactor DIV and MOD code into its own module.

* Merge DIV and MOD into arithmetic CTL.

* Clippy.

* Fixes related to merge.

* Simplify register naming.

* Generate u16 BN254 modulus limbs at compile time.

* Clippy.

* Add degree bits ranges for Arithmetic table.
2023-05-11 03:29:06 +10:00
Hamish Ivey-Law
40866e775a
Refactor arithmetic operation traits (#876)
* Use U256s in `generate(...)` interfaces; fix reduction bug modular.

* Refactor `Operation` trait.

* Rename file.

* Rename `add_cc` things to `addcy`.

* Clippy.

* Simplify generation of less-than and greater-than.

* Add some comparison tests.

* Use `PrimeField64` instead of `RichField` where possible.

* Connect `SUBMOD` operation to witness generator.

* Add clippy exception.

* Add missing verification of range counter column.

* Fix generation of RANGE_COUNTER column.

* Address William's PR comments.
2023-02-10 23:07:57 +11:00
Hamish Ivey-Law
6c4ef29fec
Add range checks to the arithmetic Stark (#866)
* Simplify loop and remove clippy.

* Offset auxiliary coefficients so they're always positive.

* Split mul aux input into lo/hi parts.

* Rename register.

* Combine `QUO_INPUT_{LO,HI}`; rearrange some columns.

* Split `MODULAR_AUX_INPUT` into high and low pieces.

* Remove range_check_error debug output.

* First draft of generating the range checks.

* Remove opcodes for operations that were defined elsewhere.

* Clean up interface to build arithmetic trace.

* Fix "degree too high" bug in DIV by zero.

* Fix constraint_transition usage in recursive compare.

* Fix variable name; use named constant.

* Fix comment values.

* Fix bug in recursive MUL circuit.

* Superficial improvements; remove unnecessary genericity.

* Fix bug in recursive MULMOD circuit.

* Remove debugging noise; expand test.

* Minor comment.

* Enforce assumption in assert.

* Make DIV its own operation.

* Make MOD it's own operation; rename structs; refactor.

* Expand basic test.

* Remove comment.

* Put Stark operations in their own file.

* Test long traces.

* Minor comment.

* Address William's comments.

* Use `const_assert!` instead of `debug_assert!` because Clippy.
2023-01-31 02:23:24 +11:00
Hamish Ivey-Law
1c87fbb712
EVM shift left/right operations (#801)
* First parts of shift implementation.

* Disable range check errors.

* Tidy up ASM.

* Update comments; fix some .sum() expressions.

* First full draft of shift left/right.

* Missed a +1.

* Clippy.

* Address Jacqui's comments.

* Add comment.

* Fix missing filter.

* Address second round of comments from Jacqui.
2022-11-09 10:47:15 +11:00
Hamish Ivey-Law
f55e07659c
Implement SUBMOD instruction (#789)
* Implement SUBMOD instruction.

* Implement recursive circuit version of SUBMOD.
2022-10-20 04:46:01 +11:00
Hamish Ivey-Law
68a5428500
Represent input columns as ranges rather than arrays (#776)
* Use std::ops::Range of columns rather than arrays of column indices.

* Refactor reading from the local values table.

* The inevitable post-push fmt/clippy commit.
2022-10-12 02:39:13 +11:00
Hamish Ivey-Law
0d0067554e
Refactor and tidy up mul.rs (#764)
* Refactor and tidy up `mul.rs`.

* Jacqui PR comments.
2022-10-11 18:59:02 +11:00
Hamish Ivey-Law
d7bb47318c
Modular operations for the EVM arithmetic unit (#755)
* First draft of 256-bit addition.

* Update comment.

* cargo fmt

* Rename addition evaluation file.

* Port ALU logic from SZ.

* Give a name to some magic numbers.

* `addition.rs` -> `add.rs`; fix carry propagation in add; impl sub.

* Clippy.

* Combine hi and lo parts of the output.

* Implement MUL.

* Suppress Clippy's attempt to make my code even harder to read.

* Next draft of MUL.

* Make all limbs (i.e. input and output) 16-bits.

* Tidying.

* Use iterators instead of building arrays.

* Documentation.

* Clippy is wrong; also cargo fmt.

* Un-refactor equality checking, since it was wrong for sub.

* Daniel comments.

* Daniel comments.

* Rename folder 'alu' -> 'arithmetic'.

* Rename file.

* Finish changing name ALU -> Arithmetic Unit.

* Finish removing dependency on array_zip feature.

* Remove operations that will be handled elsewhere.

* Rename var; tidy up.

* Clean up columns; mark places where range-checks need to be done.

* Import all names in 'columns' to reduce verbiage.

* cargo fmt

* Fix aux_in calculation in mul.

* Remove redundant 'allow's; more precise range-check size.

* Document functions.

* Document MUL instruction verification technique.

* Initial tests for ADD.

* Minor test fixes; add test for SUB.

* Fix bugs in generate functions.

* Fix SUB verification; refactor equality verification.

* cargo fmt

* Add test for MUL and fix some bugs.

* Update doc.

* Quiet incorrect clippy error.

* Initial implementation of ADDMOD and MOD.

* Fixes to addmod.

* Update doc.

* Do 1000 random tests instead of just 1.

* Documentation fix.

* Working version of ADDMOD.

* Working version of MOD.

* Name magic number; do multiple MUL tests.

* Add code and test for special case; add some docs.

* Fix spelling mistake.

* Simplify asserts.

* Tidy comment.

* Remove unused module.

* cargo fmt

* Check that output is reduced.

* Add conversion of canonical `i64` to a `Field64`.

* Handle zero modulus within degree constraint.

* cargo fmt

* Fix some comments.

* Check that the top half of the product is zero!

* Start of refactor.

* Refactoring.

* Remove zero and reduction handling from addmod.

* Refactoring; renaming; bug fixes.

* Reuse intermediate calculations across all modular operations; don't negate quot poly unnecessarily.

* Fix bug where last elt of q*m wasn't checked.

* Refactoring.

* Move circuit poly functions to utils.rs.

* Rename ADDMOD stuff to MODULAR.

* Rename module addmod -> modular.

* Handle zero modulus.

* Verify that output is reduced.

* Implement recursive version of modular circuits.

* clippy

* Tidy up i64 -> Field conversion following Jacqui's comments.

* cargo fmt

* Improved documentation.

* Address Jacqui's comments.

* Save some gates by using builder.arithmetic_extension().
2022-10-07 17:15:50 +11:00
Hamish Ivey-Law
50c9638b55
EVM arithmetic unit: unsigned comparisons (#688)
* Refactor u256 calculation; return cy/br from calculations.

* Implement less than and greater than operations.

* Add file documentation.
2022-08-26 09:13:47 +10:00
Hamish Ivey-Law
aa42312126
EVM Arithmetic Stark table (#559)
* First draft of 256-bit addition.

* Update comment.

* cargo fmt

* Rename addition evaluation file.

* Port ALU logic from SZ.

* Give a name to some magic numbers.

* `addition.rs` -> `add.rs`; fix carry propagation in add; impl sub.

* Clippy.

* Combine hi and lo parts of the output.

* Implement MUL.

* Suppress Clippy's attempt to make my code even harder to read.

* Next draft of MUL.

* Make all limbs (i.e. input and output) 16-bits.

* Tidying.

* Use iterators instead of building arrays.

* Documentation.

* Clippy is wrong; also cargo fmt.

* Un-refactor equality checking, since it was wrong for sub.

* Daniel comments.

* Daniel comments.

* Rename folder 'alu' -> 'arithmetic'.

* Rename file.

* Finish changing name ALU -> Arithmetic Unit.

* Finish removing dependency on array_zip feature.

* Remove operations that will be handled elsewhere.

* Rename var; tidy up.

* Clean up columns; mark places where range-checks need to be done.

* Import all names in 'columns' to reduce verbiage.

* cargo fmt

* Fix aux_in calculation in mul.

* Remove redundant 'allow's; more precise range-check size.

* Document functions.

* Document MUL instruction verification technique.

* Initial tests for ADD.

* Minor test fixes; add test for SUB.

* Fix bugs in generate functions.

* Fix SUB verification; refactor equality verification.

* cargo fmt

* Add test for MUL and fix some bugs.

* Update doc.

* Quiet incorrect clippy error.

* Clean up 'decode.rs'.

* Fold 'decode.rs' into 'arithmetic_stark.rs'.

* Force limb size to divide EVM register size.

* Document range-check warning and fix end value calc.

* Convert `debug_assert!`s into `assert!`s.

* Clean up various kinds of iterator usage.

* Remove unnecessary type spec.

* Document unexpected use of `collect`.
2022-06-29 11:56:48 +10:00