332 lines
12 KiB
C
332 lines
12 KiB
C
/*
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* AES-NI support functions
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*
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* Copyright The Mbed TLS Contributors
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* [AES-WP] https://www.intel.com/content/www/us/en/developer/articles/tool/intel-advanced-encryption-standard-aes-instructions-set.html
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* [CLMUL-WP] https://www.intel.com/content/www/us/en/develop/download/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode.html
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*/
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#include "aesni.h"
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#if defined(MBEDTLS_AESNI_C)
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#include <string.h>
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#if defined(MBEDTLS_AESNI_HAVE_CODE)
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/*
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* AES-NI support detection routine
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*/
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int mbedtls_aesni_has_support(unsigned int what)
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{
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static int done = 0;
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static unsigned int c = 0;
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if (!done) {
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/* AESNI using asm */
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asm ("movl $1, %%eax \n\t"
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"cpuid \n\t"
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: "=c" (c)
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:
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: "eax", "ebx", "edx");
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done = 1;
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}
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return (c & what) != 0;
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}
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/*
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* Binutils needs to be at least 2.19 to support AES-NI instructions.
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* Unfortunately, a lot of users have a lower version now (2014-04).
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* Emit bytecode directly in order to support "old" version of gas.
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*
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* Opcodes from the Intel architecture reference manual, vol. 3.
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* We always use registers, so we don't need prefixes for memory operands.
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* Operand macros are in gas order (src, dst) as opposed to Intel order
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* (dst, src) in order to blend better into the surrounding assembly code.
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*/
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#define AESDEC(regs) ".byte 0x66,0x0F,0x38,0xDE," regs "\n\t"
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#define AESDECLAST(regs) ".byte 0x66,0x0F,0x38,0xDF," regs "\n\t"
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#define AESENC(regs) ".byte 0x66,0x0F,0x38,0xDC," regs "\n\t"
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#define AESENCLAST(regs) ".byte 0x66,0x0F,0x38,0xDD," regs "\n\t"
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#define AESIMC(regs) ".byte 0x66,0x0F,0x38,0xDB," regs "\n\t"
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#define AESKEYGENA(regs, imm) ".byte 0x66,0x0F,0x3A,0xDF," regs "," imm "\n\t"
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#define PCLMULQDQ(regs, imm) ".byte 0x66,0x0F,0x3A,0x44," regs "," imm "\n\t"
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#define xmm0_xmm0 "0xC0"
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#define xmm0_xmm1 "0xC8"
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#define xmm0_xmm2 "0xD0"
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#define xmm0_xmm3 "0xD8"
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#define xmm0_xmm4 "0xE0"
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#define xmm1_xmm0 "0xC1"
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#define xmm1_xmm2 "0xD1"
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/*
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* AES-NI AES-ECB block en(de)cryption
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*/
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int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16])
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{
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asm ("movdqu (%3), %%xmm0 \n\t" // load input
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"movdqu (%1), %%xmm1 \n\t" // load round key 0
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"pxor %%xmm1, %%xmm0 \n\t" // round 0
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"add $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // normal rounds = nr - 1
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"test %2, %2 \n\t" // mode?
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"jz 2f \n\t" // 0 = decrypt
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"1: \n\t" // encryption loop
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENC(xmm1_xmm0) // do round
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"add $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // loop
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"jnz 1b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENCLAST(xmm1_xmm0) // last round
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"jmp 3f \n\t"
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"2: \n\t" // decryption loop
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"movdqu (%1), %%xmm1 \n\t"
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AESDEC(xmm1_xmm0) // do round
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"add $16, %1 \n\t"
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"subl $1, %0 \n\t"
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"jnz 2b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESDECLAST(xmm1_xmm0) // last round
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"3: \n\t"
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"movdqu %%xmm0, (%4) \n\t" // export output
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:
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: "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output)
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: "memory", "cc", "xmm0", "xmm1");
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return 0;
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}
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/*
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* Compute decryption round keys from encryption round keys
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*/
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void mbedtls_aesni_inverse_key(unsigned char *invkey, const unsigned char *fwdkey, int nr)
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{
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unsigned char *ik = invkey;
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const unsigned char *fk = fwdkey + 16 * nr;
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memcpy(ik, fk, 16);
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for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
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asm ("movdqu (%0), %%xmm0 \n\t"
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AESIMC(xmm0_xmm0)
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"movdqu %%xmm0, (%1) \n\t"
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:
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: "r" (fk), "r" (ik)
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: "memory", "xmm0");
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}
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memcpy(ik, fk, 16);
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}
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/*
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* Key expansion, 128-bit case
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*/
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static void aesni_setkey_enc_128(unsigned char *rk, const unsigned char *key)
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{
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asm ("movdqu (%1), %%xmm0 \n\t" // copy the original key
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"movdqu %%xmm0, (%0) \n\t" // as round key 0
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next round key.
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*
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* On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
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* with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r7:r6:r5:r4
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* with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm1 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
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"add $16, %0 \n\t" // point to next round key
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"movdqu %%xmm0, (%0) \n\t" // write it
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"ret \n\t"
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/* Main "loop" */
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"2: \n\t"
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AESKEYGENA(xmm0_xmm1, "0x01") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x02") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x04") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x08") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x10") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x20") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x40") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x80") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x1B") "call 1b \n\t"
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AESKEYGENA(xmm0_xmm1, "0x36") "call 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0");
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}
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/*
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* Key expansion, 192-bit case
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*/
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static void aesni_setkey_enc_192(unsigned char *rk, const unsigned char *key)
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{
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asm ("movdqu (%1), %%xmm0 \n\t" // copy original round key
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"movq 16(%1), %%xmm1 \n\t"
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next 6 quarter-keys.
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*
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* On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
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* and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
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"pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
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"pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
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"pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"ret \n\t"
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"2: \n\t"
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AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x80") "call 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0");
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}
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/*
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* Key expansion, 256-bit case
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*/
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static void aesni_setkey_enc_256(unsigned char *rk, const unsigned char *key)
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{
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asm ("movdqu (%1), %%xmm0 \n\t"
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"movdqu 16(%1), %%xmm1 \n\t"
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"movdqu %%xmm1, (%0) \n\t"
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next two round keys.
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*
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* On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
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* xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
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*
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* On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
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* and those have been written to the output buffer.
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*/
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"1: \n\t"
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"pshufd $0xff, %%xmm2, %%xmm2 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm2, %%xmm0 \n\t"
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"add $16, %0 \n\t"
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"movdqu %%xmm0, (%0) \n\t"
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/* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
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* and proceed to generate next round key from there */
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AESKEYGENA(xmm0_xmm2, "0x00")
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"pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm2, %%xmm1 \n\t"
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"add $16, %0 \n\t"
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"movdqu %%xmm1, (%0) \n\t"
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"ret \n\t"
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/*
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* Main "loop" - Generating one more key than necessary,
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* see definition of mbedtls_aes_context.buf
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*/
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"2: \n\t"
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AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
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AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0");
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}
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/*
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* Key expansion, wrapper
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*/
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int mbedtls_aesni_setkey_enc(unsigned char *rk, const unsigned char *key, size_t bits)
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{
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switch (bits) {
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case 128: aesni_setkey_enc_128(rk, key); break;
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case 192: aesni_setkey_enc_192(rk, key); break;
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case 256: aesni_setkey_enc_256(rk, key); break;
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default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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return 0;
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}
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#endif /* MBEDTLS_AESNI_HAVE_CODE */
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#endif /* MBEDTLS_AESNI_C */
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