305 lines
6.1 KiB
ArmAsm
305 lines
6.1 KiB
ArmAsm
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// Code generated by command: go run equal_fold_asm.go -pkg ascii -out ../ascii/equal_fold_amd64.s -stubs ../ascii/equal_fold_amd64.go. DO NOT EDIT.
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//go:build !purego
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// +build !purego
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#include "textflag.h"
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// func EqualFoldString(a string, b string) bool
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// Requires: AVX, AVX2, SSE4.1
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TEXT ·EqualFoldString(SB), NOSPLIT, $0-33
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MOVQ a_base+0(FP), CX
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MOVQ a_len+8(FP), DX
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MOVQ b_base+16(FP), BX
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CMPQ DX, b_len+24(FP)
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JNE done
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XORQ AX, AX
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CMPQ DX, $0x10
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JB init_x86
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BTL $0x08, github·com∕segmentio∕asm∕cpu·X86+0(SB)
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JCS init_avx
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init_x86:
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LEAQ github·com∕segmentio∕asm∕ascii·lowerCase+0(SB), R9
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XORL SI, SI
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cmp8:
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CMPQ DX, $0x08
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JB cmp7
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MOVBLZX (CX)(AX*1), DI
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MOVBLZX (BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 1(CX)(AX*1), DI
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MOVBLZX 1(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 2(CX)(AX*1), DI
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MOVBLZX 2(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 3(CX)(AX*1), DI
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MOVBLZX 3(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 4(CX)(AX*1), DI
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MOVBLZX 4(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 5(CX)(AX*1), DI
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MOVBLZX 5(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 6(CX)(AX*1), DI
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MOVBLZX 6(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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MOVBLZX 7(CX)(AX*1), DI
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MOVBLZX 7(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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JNE done
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ADDQ $0x08, AX
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SUBQ $0x08, DX
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JMP cmp8
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cmp7:
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CMPQ DX, $0x07
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JB cmp6
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MOVBLZX 6(CX)(AX*1), DI
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MOVBLZX 6(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp6:
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CMPQ DX, $0x06
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JB cmp5
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MOVBLZX 5(CX)(AX*1), DI
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MOVBLZX 5(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp5:
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CMPQ DX, $0x05
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JB cmp4
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MOVBLZX 4(CX)(AX*1), DI
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MOVBLZX 4(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp4:
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CMPQ DX, $0x04
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JB cmp3
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MOVBLZX 3(CX)(AX*1), DI
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MOVBLZX 3(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp3:
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CMPQ DX, $0x03
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JB cmp2
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MOVBLZX 2(CX)(AX*1), DI
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MOVBLZX 2(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp2:
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CMPQ DX, $0x02
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JB cmp1
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MOVBLZX 1(CX)(AX*1), DI
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MOVBLZX 1(BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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cmp1:
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CMPQ DX, $0x01
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JB success
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MOVBLZX (CX)(AX*1), DI
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MOVBLZX (BX)(AX*1), R8
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MOVB (R9)(DI*1), DI
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XORB (R9)(R8*1), DI
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ORB DI, SI
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done:
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SETEQ ret+32(FP)
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RET
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success:
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MOVB $0x01, ret+32(FP)
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RET
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init_avx:
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MOVB $0x20, SI
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PINSRB $0x00, SI, X12
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VPBROADCASTB X12, Y12
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MOVB $0x1f, SI
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PINSRB $0x00, SI, X13
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VPBROADCASTB X13, Y13
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MOVB $0x9a, SI
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PINSRB $0x00, SI, X14
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VPBROADCASTB X14, Y14
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MOVB $0x01, SI
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PINSRB $0x00, SI, X15
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VPBROADCASTB X15, Y15
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cmp128:
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CMPQ DX, $0x80
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JB cmp64
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VMOVDQU (CX)(AX*1), Y0
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VMOVDQU 32(CX)(AX*1), Y1
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VMOVDQU 64(CX)(AX*1), Y2
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VMOVDQU 96(CX)(AX*1), Y3
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VMOVDQU (BX)(AX*1), Y4
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VMOVDQU 32(BX)(AX*1), Y5
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VMOVDQU 64(BX)(AX*1), Y6
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VMOVDQU 96(BX)(AX*1), Y7
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VXORPD Y0, Y4, Y4
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VPCMPEQB Y12, Y4, Y8
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VORPD Y12, Y0, Y0
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VPADDB Y13, Y0, Y0
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VPCMPGTB Y0, Y14, Y0
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VPAND Y8, Y0, Y0
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VPAND Y15, Y0, Y0
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VPSLLW $0x05, Y0, Y0
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VPCMPEQB Y4, Y0, Y0
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VXORPD Y1, Y5, Y5
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VPCMPEQB Y12, Y5, Y9
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VORPD Y12, Y1, Y1
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VPADDB Y13, Y1, Y1
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VPCMPGTB Y1, Y14, Y1
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VPAND Y9, Y1, Y1
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VPAND Y15, Y1, Y1
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VPSLLW $0x05, Y1, Y1
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VPCMPEQB Y5, Y1, Y1
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VXORPD Y2, Y6, Y6
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VPCMPEQB Y12, Y6, Y10
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VORPD Y12, Y2, Y2
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VPADDB Y13, Y2, Y2
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VPCMPGTB Y2, Y14, Y2
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VPAND Y10, Y2, Y2
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VPAND Y15, Y2, Y2
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VPSLLW $0x05, Y2, Y2
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VPCMPEQB Y6, Y2, Y2
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VXORPD Y3, Y7, Y7
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VPCMPEQB Y12, Y7, Y11
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VORPD Y12, Y3, Y3
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VPADDB Y13, Y3, Y3
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VPCMPGTB Y3, Y14, Y3
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VPAND Y11, Y3, Y3
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VPAND Y15, Y3, Y3
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VPSLLW $0x05, Y3, Y3
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VPCMPEQB Y7, Y3, Y3
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VPAND Y1, Y0, Y0
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VPAND Y3, Y2, Y2
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VPAND Y2, Y0, Y0
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ADDQ $0x80, AX
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SUBQ $0x80, DX
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VPMOVMSKB Y0, SI
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XORL $0xffffffff, SI
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JNE done
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JMP cmp128
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cmp64:
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CMPQ DX, $0x40
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JB cmp32
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VMOVDQU (CX)(AX*1), Y0
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VMOVDQU 32(CX)(AX*1), Y1
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VMOVDQU (BX)(AX*1), Y2
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VMOVDQU 32(BX)(AX*1), Y3
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VXORPD Y0, Y2, Y2
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VPCMPEQB Y12, Y2, Y4
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VORPD Y12, Y0, Y0
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VPADDB Y13, Y0, Y0
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VPCMPGTB Y0, Y14, Y0
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VPAND Y4, Y0, Y0
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VPAND Y15, Y0, Y0
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VPSLLW $0x05, Y0, Y0
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VPCMPEQB Y2, Y0, Y0
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VXORPD Y1, Y3, Y3
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VPCMPEQB Y12, Y3, Y5
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VORPD Y12, Y1, Y1
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VPADDB Y13, Y1, Y1
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VPCMPGTB Y1, Y14, Y1
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VPAND Y5, Y1, Y1
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VPAND Y15, Y1, Y1
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VPSLLW $0x05, Y1, Y1
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VPCMPEQB Y3, Y1, Y1
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VPAND Y1, Y0, Y0
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ADDQ $0x40, AX
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SUBQ $0x40, DX
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VPMOVMSKB Y0, SI
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XORL $0xffffffff, SI
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JNE done
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cmp32:
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CMPQ DX, $0x20
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JB cmp16
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VMOVDQU (CX)(AX*1), Y0
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VMOVDQU (BX)(AX*1), Y1
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VXORPD Y0, Y1, Y1
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VPCMPEQB Y12, Y1, Y2
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VORPD Y12, Y0, Y0
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VPADDB Y13, Y0, Y0
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VPCMPGTB Y0, Y14, Y0
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VPAND Y2, Y0, Y0
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VPAND Y15, Y0, Y0
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VPSLLW $0x05, Y0, Y0
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VPCMPEQB Y1, Y0, Y0
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ADDQ $0x20, AX
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SUBQ $0x20, DX
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VPMOVMSKB Y0, SI
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XORL $0xffffffff, SI
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JNE done
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cmp16:
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CMPQ DX, $0x10
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JLE cmp_tail
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VMOVDQU (CX)(AX*1), X0
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VMOVDQU (BX)(AX*1), X1
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VXORPD X0, X1, X1
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VPCMPEQB X12, X1, X2
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VORPD X12, X0, X0
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VPADDB X13, X0, X0
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VPCMPGTB X0, X14, X0
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VPAND X2, X0, X0
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VPAND X15, X0, X0
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VPSLLW $0x05, X0, X0
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VPCMPEQB X1, X0, X0
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ADDQ $0x10, AX
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SUBQ $0x10, DX
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VPMOVMSKB X0, SI
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XORL $0x0000ffff, SI
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JNE done
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cmp_tail:
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SUBQ $0x10, DX
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ADDQ DX, AX
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VMOVDQU (CX)(AX*1), X0
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VMOVDQU (BX)(AX*1), X1
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VXORPD X0, X1, X1
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VPCMPEQB X12, X1, X2
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VORPD X12, X0, X0
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VPADDB X13, X0, X0
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VPCMPGTB X0, X14, X0
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VPAND X2, X0, X0
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VPAND X15, X0, X0
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VPSLLW $0x05, X0, X0
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VPCMPEQB X1, X0, X0
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VPMOVMSKB X0, AX
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XORL $0x0000ffff, AX
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JMP done
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