Merge pull request #11 from PSYCPU/master
1st assembly version of 5x64 field code
This commit is contained in:
Pieter Wuille
commit
2ce0e50af3
19
Makefile
19
Makefile
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@ -8,11 +8,11 @@ JAVA_FILES := src/java/org_bitcoin_NativeSecp256k1.h src/java/org_bitcoin_Native
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OBJS :=
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ifeq ($(USE_ASM), 1)
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OBJS := $(OBJS) obj/field_5x52_asm.o
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OBJS := $(OBJS) obj/field_5x$(HAVE_LIMB)_asm.o
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endif
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STD="gnu99"
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default: tests libsecp256k1.a libsecp256k1.so
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./tests
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clean:
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rm -rf obj/*.o bench tests *.a *.so config.mk
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@ -20,18 +20,21 @@ clean:
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obj/field_5x52_asm.o: src/field_5x52_asm.asm
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$(YASM) -f elf64 -o obj/field_5x52_asm.o src/field_5x52_asm.asm
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obj/field_5x64_asm.o: src/field_5x64_asm.asm
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$(YASM) -f elf64 -o obj/field_5x64_asm.o src/field_5x64_asm.asm
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obj/secp256k1.o: $(FILES) src/secp256k1.c include/secp256k1.h
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$(CC) -fPIC -std=c99 $(CFLAGS) $(CFLAGS_EXTRA) -DNDEBUG -O2 src/secp256k1.c -c -o obj/secp256k1.o
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$(CC) -fPIC -std=$(STD) $(CFLAGS) $(CFLAGS_EXTRA) -DNDEBUG -$(OPTLEVEL) src/secp256k1.c -c -o obj/secp256k1.o
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bench: $(FILES) src/bench.c $(OBJS)
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$(CC) -fPIC -std=c99 $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DNDEBUG -O2 src/bench.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o bench
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$(CC) -fPIC -std=$(STD) $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DNDEBUG -$(OPTLEVEL) src/bench.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o bench
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tests: $(FILES) src/tests.c $(OBJS)
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$(CC) -std=c99 $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DVERIFY -fstack-protector-all -O2 -ggdb3 src/tests.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o tests
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$(CC) -std=$(STD) $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DVERIFY -fstack-protector-all -$(OPTLEVEL) -ggdb3 src/tests.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o tests
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coverage: $(FILES) src/tests.c $(OBJS)
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rm -rf tests.gcno tests.gcda tests_cov
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$(CC) -std=c99 $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DVERIFY --coverage -O0 -g src/tests.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o tests_cov
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$(CC) -std=$(STD) $(CFLAGS) $(CFLAGS_EXTRA) $(CFLAGS_TEST_EXTRA) -DVERIFY --coverage -$(OPTLEVEL) -g src/tests.c $(OBJS) $(LDFLAGS_EXTRA) $(LDFLAGS_TEST_EXTRA) -o tests_cov
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rm -rf lcov
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mkdir -p lcov
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cd lcov; lcov --directory ../ --zerocounters
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@ -43,7 +46,7 @@ libsecp256k1.a: obj/secp256k1.o $(OBJS)
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$(AR) -rs $@ $(OBJS) obj/secp256k1.o
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libsecp256k1.so: obj/secp256k1.o $(OBJS)
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$(CC) -std=c99 $(LDFLAGS_EXTRA) $(OBJS) obj/secp256k1.o -shared -o libsecp256k1.so
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$(CC) -std=$(STD) $(LDFLAGS_EXTRA) $(OBJS) obj/secp256k1.o -shared -o libsecp256k1.so
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libjavasecp256k1.so: $(OBJS) obj/secp256k1.o $(JAVA_FILES)
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$(CC) -fPIC -std=c99 $(CFLAGS) $(CFLAGS_EXTRA) -DNDEBUG -O2 -I. src/java/org_bitcoin_NativeSecp256k1.c $(LDFLAGS_EXTRA) $(OBJS) obj/secp256k1.o -shared -o libjavasecp256k1.so
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$(CC) -fPIC -std=$(STD) $(CFLAGS) $(CFLAGS_EXTRA) -DNDEBUG -$(OPTLEVEL) -I. src/java/org_bitcoin_NativeSecp256k1.c $(LDFLAGS_EXTRA) $(OBJS) obj/secp256k1.o -shared -o libjavasecp256k1.so
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@ -0,0 +1,14 @@
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#!/bin/bash
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echo "Benchmark Results" >output.txt
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for j in no-yasm yasm; do
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echo "5x64 $j:" >>output.txt
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for i in O0 O1 O2 O3; do
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make clean
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./configure --$j
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echo "OPTLEVEL=$i" >>config.mk
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make bench
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echo "OPTLEVEL=$i" >>output.txt
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(time ./bench) |& grep real >>output.txt
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done
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done
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@ -97,6 +97,9 @@ if [ "$?" = 0 ]; then
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HAVE_INT128=1
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fi
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#default limb size
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HAVE_LIMB=52
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for arg in "$@"; do
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case "$arg" in
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--no-yasm)
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@ -107,6 +110,9 @@ for arg in "$@"; do
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;;
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--no-openssl)
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HAVE_OPENSSL=0
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;;
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--use-5x64)
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HAVE_LIMB=64
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;;
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esac
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done
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@ -117,10 +123,10 @@ USE_ASM=0
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# select field implementation
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if [ "$HAVE_YASM" = "1" ]; then
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CFLAGS_FIELD="-DUSE_FIELD_5X52 -DUSE_FIELD_5X52_ASM"
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CFLAGS_FIELD="-DUSE_FIELD_5X$HAVE_LIMB -DUSE_FIELD_5X${HAVE_LIMB}_ASM"
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USE_ASM=1
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elif [ "$HAVE_INT128" = "1" ]; then
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CFLAGS_FIELD="-DUSE_FIELD_5X52 -DUSE_FIELD_5X52_INT128"
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CFLAGS_FIELD="-DUSE_FIELD_5X$HAVE_LIMB -DUSE_FIELD_5X${HAVE_LIMB}_INT128"
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elif [ "$HAVE_GMP" = "1" ]; then
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CFLAGS_FIELD="-DUSE_FIELD_GMP"
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LINK_GMP=1
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@ -165,3 +171,4 @@ echo "CFLAGS_TEST_EXTRA=$CFLAGS_TEST_EXTRA" >> config.mk
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echo "LDFLAGS_EXTRA=$LDFLAGS_EXTRA" >> config.mk
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echo "LDFLAGS_TEST_EXTRA=$LDFLAGS_TEST_EXTRA" >> config.mk
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echo "USE_ASM=$USE_ASM" >>config.mk
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echo "HAVE_LIMB=$HAVE_LIMB" >>config.mk
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@ -314,7 +314,7 @@ common_exit_norm:
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;; rbx = a.n[2] / t6
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;; rcx = a.n[3] / t7
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;; rbp = 0FFFFFFFFFFFFFh / t8
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;; rsi = a.n[4] / a.n[4] /t9
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;; rsi = a.n[4] / t9
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GLOBAL secp256k1_fe_sqr_inner
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ALIGN 32
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secp256k1_fe_sqr_inner:
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@ -0,0 +1,333 @@
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;; Added by Diederik Huys, March 2013
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;;
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;; Provided public procedures:
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;; secp256k1_fe_mul_inner
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;; secp256k1_fe_sqr_inner
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;;
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;; Needed tools: YASM (http://yasm.tortall.net)
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;;
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;;
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BITS 64
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COMP_LIMB EQU 000000001000003D1h
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;; Procedure ExSetMult
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;; Register Layout:
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;; INPUT: rdi = a->n
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;; rsi = b->n
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;; rdx = r->a
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;;
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; r8-r10 = c0-c2
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;; r11-r15 = b.n[0]-b.n[4] / r3 - r7
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;; rbx = r0
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;; rcx = r1
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;; rbp = r2
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;;
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GLOBAL secp256k1_fe_mul_inner
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ALIGN 32
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secp256k1_fe_mul_inner:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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push rdx
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mov r11,[rsi+8*0] ; preload b.n[0]
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;; step 1: mul_c2
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mov rax,[rdi+0*8] ; load a.n[0]
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mul r11 ; rdx:rax=a.n[0]*b.n[0]
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mov r12,[rsi+1*8] ; preload b.n[1]
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mov rbx,rax ; retire LO qword (r[0])
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mov r8,rdx ; save overflow
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xor r9,r9 ; overflow HO qwords
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xor r10,r10
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;; c+=a.n[0] * b.n[1] + a.n[1] * b.n[0]
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mov rax,[rdi+0*8]
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mul r12
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mov r13,[rsi+2*8] ; preload b.n[2]
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add r8,rax ; still the same :-)
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adc r9,rdx ;
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adc r10,0 ; mmm...
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mov rax,[rdi+1*8]
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mul r11
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rcx,r8 ; retire r[1]
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xor r8,r8
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;; c+=a.n[0 1 2] * b.n[2 1 0]
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mov rax,[rdi+0*8]
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mul r13
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mov r14,[rsi+3*8] ; preload b.n[3]
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,[rdi+1*8]
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mul r12
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,[rdi+2*8]
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mul r11
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rbp,r9 ; retire r[2]
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xor r9,r9
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;; c+=a.n[0 1 2 3] * b.n[3 2 1 0]
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mov rax,[rdi+0*8]
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mul r14
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+1*8]
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mul r13
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+2*8]
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mul r12
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+3*8]
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mul r11
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r11,r10 ; retire r[3]
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xor r10,r10
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;; c+=a.n[1 2 3] * b.n[3 2 1]
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mov rax,[rdi+1*8]
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mul r14
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,[rdi+2*8]
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mul r13
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,[rdi+3*8]
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mul r12
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov r12,r8 ; retire r[4]
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xor r8,r8
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;; c+=a.n[2 3] * b.n[3 2]
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mov rax,[rdi+2*8]
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mul r14
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add r9,rax ; still the same :-)
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adc r10,rdx ;
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adc r8,0 ; mmm...
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mov rax,[rdi+3*8]
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mul r13
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov r13,r9 ; retire r[5]
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xor r9,r9
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;; c+=a.n[3] * b.n[3]
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mov rax,[rdi+3*8]
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mul r14
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r14,r10
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mov r15,r8
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;; *******************************************************
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common_exit_norm:
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mov rdi,COMP_LIMB
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mov rax,r12
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mul rdi
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add rax,rbx
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adc rcx,rdx
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pop rbx
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mov [rbx],rax
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mov rax,r13 ; get r5
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mul rdi
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add rax,rcx ; +r1
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adc rbp,rdx
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mov [rbx+1*8],rax
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mov rax,r14 ; get r6
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mul rdi
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add rax,rbp ; +r2
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adc r11,rdx
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mov [rbx+2*8],rax
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mov rax,r15 ; get r7
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mul rdi
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add rax,r11 ; +r3
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adc rdx,0
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mov [rbx+3*8],rax
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mov [rbx+4*8],rdx
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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;; PROC ExSetSquare
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;; Register Layout:
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;; INPUT: rdi = a.n
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;; rsi = this.a
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; r8-r10 = c
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;; r11-r15 = a.n[0]-a.n[4] / r3-r7
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;; rbx = r0
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;; rcx = r1
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;; rbp = r2
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GLOBAL secp256k1_fe_sqr_inner
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ALIGN 32
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secp256k1_fe_sqr_inner:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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push rdx
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mov r11,[rdi+8*0] ; preload a.n[0]
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;; step 1: mul_c2
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mov rax,r11 ; load a.n[0]
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mul rax ; rdx:rax=a.n[0]²
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mov r12,[rdi+1*8] ; preload a.n[1]
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mov rbx,rax ; retire LO qword (r[0])
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mov r8,rdx ; save overflow
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xor r9,r9 ; overflow HO qwords
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xor r10,r10
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;; c+=2*a.n[0] * a.n[1]
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mov rax,r11 ; load a.n[0]
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mul r12 ; rdx:rax=a.n[0] * a.n[1]
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mov r13,[rdi+2*8] ; preload a.n[2]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r10,0
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add r8,rax ; still the same :-)
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adc r9,rdx ;
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adc r10,0 ; mmm...
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mov rcx,r8 ; retire r[1]
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xor r8,r8
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;; c+=2*a.n[0]*a.n[2]+a.n[1]*a.n[1]
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mov rax,r11 ; load a.n[0]
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mul r13 ; * a.n[2]
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mov r14,[rdi+3*8] ; preload a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r8,0
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,r12
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mul rax
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rbp,r9
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xor r9,r9
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;; c+=2*a.n[0]*a.n[3]+2*a.n[1]*a.n[2]
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mov rax,r11 ; load a.n[0]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r9,0
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,r12 ; load a.n[1]
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mul r13 ; * a.n[2]
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add rax,rax
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adc rdx,rdx
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adc r9,0
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r11,r10
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xor r10,r10
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;; c+=2*a.n[1]*a.n[3]+a.n[2]*a.n[2]
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mov rax,r12 ; load a.n[1]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r10,0
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,r13
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mul rax
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov r12,r8
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xor r8,r8
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;; c+=2*a.n[2]*a.n[3]
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mov rax,r13 ; load a.n[2]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r8,0
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov r13,r9
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xor r13,r13
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;; c+=a.n[3]²
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mov rax,r14
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mul rax
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add r10,rax
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adc r8,rdx
|
||||
adc r9,0
|
||||
|
||||
mov r14,r10
|
||||
mov r15,r8
|
||||
|
||||
jmp common_exit_norm
|
||||
end
|
||||
|
||||
|
||||
|
|
@ -11,6 +11,7 @@
|
|||
#include "../field.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include "field_5x64_asm.h"
|
||||
|
||||
/** Implements arithmetic modulo FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFE FFFFFC2F,
|
||||
* represented as 4 uint64_t's in base 2^64, and one overflow uint64_t.
|
||||
|
|
@ -264,9 +265,14 @@ void static inline secp256k1_fe_add(secp256k1_fe_t *r, const secp256k1_fe_t *a)
|
|||
}
|
||||
|
||||
void static secp256k1_fe_mul(secp256k1_fe_t *r, const secp256k1_fe_t *ac, const secp256k1_fe_t *bc) {
|
||||
|
||||
secp256k1_fe_t a = *ac, b = *bc;
|
||||
secp256k1_fe_reduce(&a);
|
||||
secp256k1_fe_reduce(&b);
|
||||
|
||||
#ifdef USE_FIELD_5X64_ASM
|
||||
secp256k1_fe_mul_inner((&a)->n,(&b)->n,r->n);
|
||||
#else
|
||||
uint64_t c1,c2,c3;
|
||||
c3=0;
|
||||
mul_c2(a.n[0], b.n[0], c1, c2);
|
||||
|
|
@ -303,6 +309,7 @@ void static secp256k1_fe_mul(secp256k1_fe_t *r, const secp256k1_fe_t *ac, const
|
|||
c = (unsigned __int128)r7 * COMP_LIMB + r3 + (c >> 64);
|
||||
r->n[3] = c;
|
||||
r->n[4] = c >> 64;
|
||||
#endif
|
||||
|
||||
#ifdef VERIFY
|
||||
r->normalized = 0;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,11 @@
|
|||
// Copyright (c) 2013 Pieter Wuille
|
||||
// Distributed under the MIT/X11 software license, see the accompanying
|
||||
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
|
||||
|
||||
#ifndef _SECP256K1_FIELD_INNER5X52_IMPL_H_
|
||||
#define _SECP256K1_FIELD_INNER5X52_IMPL_H_
|
||||
|
||||
void __attribute__ ((sysv_abi)) secp256k1_fe_mul_inner(const uint64_t *a, const uint64_t *b, uint64_t *r);
|
||||
void __attribute__ ((sysv_abi)) secp256k1_fe_sqr_inner(const uint64_t *a, uint64_t *r);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue