5% more speed to divmod

This commit is contained in:
mratsim 2018-02-17 17:57:26 +01:00
parent 6fd471f243
commit f06c02cf2a
3 changed files with 10 additions and 6 deletions

View File

@ -44,6 +44,9 @@ proc bit_length*[T: MpUint](n: T): int {.noSideEffect.}=
const maxHalfRepr = n.lo.type.sizeof * 8 - 1 const maxHalfRepr = n.lo.type.sizeof * 8 - 1
# Changing the following to an if expression somehow transform the whole ASM to 5 branches
# instead of the 4 expected (with the inline ASM from bit_length_impl)
# Also there does not seems to be a way to generate a conditional mov
if n.hi.bit_length == 0: if n.hi.bit_length == 0:
n.lo.bit_length n.lo.bit_length
else: else:

View File

@ -114,16 +114,11 @@ proc divmod*[T: BaseUint](x, y: T): tuple[quot, rem: T] {.noSideEffect.}=
when x.lo is MpUInt: when x.lo is MpUInt:
const one = T(lo: getSubType(T)(1)) const one = T(lo: getSubType(T)(1))
const mpOne = one
else: else:
const one: getSubType(T) = 1 const one: getSubType(T) = 1
const mpOne = T(lo: getSubType(T)(1))
if y == zero: if unlikely(y.isZero):
raise newException(DivByZeroError, "You attempted to divide by zero") raise newException(DivByZeroError, "You attempted to divide by zero")
elif y == mpOne:
result.quot = x
return
var var
shift = x.bit_length - y.bit_length shift = x.bit_length - y.bit_length

View File

@ -11,3 +11,9 @@ proc `<=`*[T: MpUint](x, y: T): bool {.noSideEffect, noInit, inline.}=
if x == y: if x == y:
return true return true
x < y x < y
proc isZero[T: SomeUnsignedInt](n: T): bool {.noSideEffect,inline.} =
n == 0.T
proc isZero*(n: MpUint): bool {.noSideEffect,inline.} =
n.lo.isZero and n.hi.isZero