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start screen driver implementation

This commit is contained in:
Michele Balistreri 2023-03-24 18:27:38 +01:00
parent 4199015b93
commit 06989267fe
No known key found for this signature in database
GPG Key ID: E9567DA33A4F791A
15 changed files with 4422 additions and 474 deletions
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14
app/hal.h
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@ -36,10 +36,16 @@ hal_err_t hal_camera_stop();
hal_err_t hal_camera_next_frame(uint8_t** fb); hal_err_t hal_camera_next_frame(uint8_t** fb);
hal_err_t hal_camera_submit(uint8_t* fb); hal_err_t hal_camera_submit(uint8_t* fb);
// Screen
#define SCREEN_WIDTH 240
#define SCREEN_HEIGHT 240
// GPIO // GPIO
typedef enum { typedef enum {
GPIO_CAMERA_PWDN = 0, GPIO_CAMERA_PWDN = 0,
GPIO_CAMERA_RST, GPIO_CAMERA_RST,
GPIO_LCD_CMD_DATA,
GPIO_LCD_RST,
} hal_gpio_pin_t; } hal_gpio_pin_t;
typedef enum { typedef enum {
@ -63,6 +69,14 @@ typedef enum {
hal_err_t hal_uart_send(hal_uart_port_t port, const uint8_t* data, size_t len); hal_err_t hal_uart_send(hal_uart_port_t port, const uint8_t* data, size_t len);
// SPI
typedef enum {
SPI_LCD
} hal_spi_port_t;
hal_err_t hal_spi_send(hal_spi_port_t port, const uint8_t* data, size_t len);
hal_err_t hal_spi_send_dma(hal_spi_port_t port, const uint8_t* data, size_t len);
// Crypto (only use in crypto library) // Crypto (only use in crypto library)
hal_err_t hal_rng_next(uint8_t *buf, size_t len); hal_err_t hal_rng_next(uint8_t *buf, size_t len);

1
app/screen/screen.c Normal file
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@ -0,0 +1 @@
#include "screen.h"

18
app/screen/screen.h Normal file
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@ -0,0 +1,18 @@
#ifndef _SCREEN_H_
#define _SCREEN_H_
#include "hal.h"
#define _SCREEN_MODEL ST7789
typedef struct {
uint16_t x;
uint16_t y;
uint16_t width;
uint16_t height;
} screen_area_t;
hal_err_t screen_init();
hal_err_t screen_draw_area(screen_area_t* area, uint16_t* pixels);
#endif

61
app/screen/st7789.c Normal file
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@ -0,0 +1,61 @@
#include "screen.h"
#include "st7789.h"
#include "FreeRTOS.h"
#include "task.h"
#if (_SCREEN_MODEL == ST7789)
hal_err_t st7789_write_cmd(uint8_t cmd) {
hal_gpio_set(GPIO_LCD_CMD_DATA, GPIO_RESET);
return hal_spi_send(SPI_LCD, &cmd, 1);
}
hal_err_t st7789_write_params(const uint8_t* params, size_t len) {
hal_gpio_set(GPIO_LCD_CMD_DATA, GPIO_SET);
return hal_spi_send(SPI_LCD, params, len);
}
static inline hal_err_t st7789_set_reg8(uint8_t reg, uint8_t value) {
if (st7789_write_cmd(reg) != HAL_OK) {
return HAL_ERROR;
}
return st7789_write_params(&value, 1);
}
hal_err_t screen_init() {
hal_gpio_set(GPIO_LCD_RST, GPIO_RESET);
hal_delay_us(ST7789_RST_PULSE_US);
hal_gpio_set(GPIO_LCD_RST, GPIO_SET);
vTaskDelay(pdMS_TO_TICKS(ST7789_CMD_DELAY_MS));
if (st7789_write_cmd(ST7789_SLPOUT) != HAL_OK) {
return HAL_ERROR;
}
vTaskDelay(pdMS_TO_TICKS(ST7789_CMD_DELAY_MS));
if (st7789_set_reg8(ST7789_COLMOD, ST7789_COLOR_MODE_65K | ST7789_COLOR_MODE_16BIT) != HAL_OK) {
return HAL_ERROR;
}
if (st7789_set_reg8(ST7789_MADCTL, ST7789_MADCTL_RGB) != HAL_OK) {
return HAL_ERROR;
}
if (st7789_write_cmd(ST7789_INVOFF) != HAL_OK) {
return HAL_ERROR;
}
if (st7789_write_cmd(ST7789_NORON) != HAL_OK) {
return HAL_ERROR;
}
return st7789_write_cmd(ST7789_DISPON);
}
hal_err_t screen_draw_area(screen_area_t* area, uint16_t* pixels) {
return HAL_ERROR;
}
#endif

85
app/screen/st7789.h Normal file
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@ -0,0 +1,85 @@
#ifndef _ST7789_H_
#define _ST7789_H_
#include <stdint.h>
#define ST7789_CMD_DELAY_MS 10
#define ST7789_RST_PULSE_US 12
#define ST7789_NOP0x00
#define ST7789_SWRESET 0x01
#define ST7789_RDDID 0x04
#define ST7789_RDDST 0x09
#define ST7789_SLPIN 0x10
#define ST7789_SLPOUT 0x11
#define ST7789_PTLON 0x12
#define ST7789_NORON 0x13
#define ST7789_INVOFF 0x20
#define ST7789_INVON 0x21
#define ST7789_DISPOFF 0x28
#define ST7789_DISPON 0x29
#define ST7789_CASET 0x2A
#define ST7789_RASET 0x2B
#define ST7789_RAMWR 0x2C
#define ST7789_RAMRD 0x2E
#define ST7789_PTLAR 0x30
#define ST7789_COLMOD 0x3A
#define ST7789_MADCTL 0x36
#define ST7789_MADCTL_MY 0x80 // Page Address Order
#define ST7789_MADCTL_MX 0x40 // Column Address Order
#define ST7789_MADCTL_MV 0x20 // Page/Column Order
#define ST7789_MADCTL_ML 0x10 // Line Address Order
#define ST7789_MADCTL_MH 0x04 // Display Data Latch Order
#define ST7789_MADCTL_RGB 0x00
#define ST7789_MADCTL_BGR 0x08
#define ST7789_RDID1 0xDA
#define ST7789_RDID2 0xDB
#define ST7789_RDID3 0xDC
#define ST7789_RDID4 0xDD
// color modes
#define ST7789_COLOR_MODE_65K 0x50
#define ST7789_COLOR_MODE_262K 0x60
#define ST7789_COLOR_MODE_12BIT 0x03
#define ST7789_COLOR_MODE_16BIT 0x05
#define ST7789_COLOR_MODE_18BIT 0x06
#define ST7789_COLOR_MODE_16M 0x07
// Color definitions
#define ST_R_POS_RGB 11 // Red last bit position for RGB display
#define ST_G_POS_RGB 5 // Green last bit position for RGB display
#define ST_B_POS_RGB 0 // Blue last bit position for RGB display
#define ST_RGB(R,G,B) \
(((uint16_t)(R >> 3) << ST_R_POS_RGB) | \
((uint16_t)(G >> 2) << ST_G_POS_RGB) | \
((uint16_t)(B >> 3) << ST_B_POS_RGB))
#define ST_COLOR_BLACK ST_RGB(0, 0, 0)
#define ST_COLOR_NAVY ST_RGB(0, 0, 123)
#define ST_COLOR_DARKGREEN ST_RGB(0, 125, 0)
#define ST_COLOR_DARKCYAN ST_RGB(0, 125, 123)
#define ST_COLOR_MAROON ST_RGB(123, 0, 0)
#define ST_COLOR_PURPLE ST_RGB(123, 0, 123)
#define ST_COLOR_OLIVE ST_RGB(123, 125, 0)
#define ST_COLOR_LIGHTGREY ST_RGB(198, 195, 198)
#define ST_COLOR_DARKGREY ST_RGB(123, 125, 123)
#define ST_COLOR_BLUE ST_RGB(0, 0, 255)
#define ST_COLOR_GREEN ST_RGB(0, 255, 0)
#define ST_COLOR_CYAN ST_RGB(0, 255, 255)
#define ST_COLOR_RED ST_RGB(255, 0, 0)
#define ST_COLOR_MAGENTA ST_RGB(255, 0, 255)
#define ST_COLOR_YELLOW ST_RGB(255, 255, 0)
#define ST_COLOR_WHITE ST_RGB(255, 255, 255)
#define ST_COLOR_ORANGE ST_RGB(255, 165, 0)
#define ST_COLOR_GREENYELLOW ST_RGB(173, 255, 41)
#define ST_COLOR_PINK ST_RGB(255, 130, 198)
#endif

5
app/tasks/qrscan_task.c
View File

@ -5,6 +5,7 @@
#include "qrcode/qrcode.h" #include "qrcode/qrcode.h"
#include "ur/ur.h" #include "ur/ur.h"
#include "ur/eip4527_decode.h" #include "ur/eip4527_decode.h"
#include "screen/screen.h"
static struct quirc_code qrcode; static struct quirc_code qrcode;
static struct quirc_data qrdata; static struct quirc_data qrdata;
@ -20,6 +21,10 @@ void qrscan_task_entry(void* pvParameters) {
goto fail; goto fail;
} }
if (screen_init() != HAL_OK) {
LOG_MSG("Failed to init screen");
}
while (1) { while (1) {
uint8_t* fb; uint8_t* fb;
if (camera_next_frame(&fb) != HAL_OK) { if (camera_next_frame(&fb) != HAL_OK) {

2
nxp/.cproject
View File

@ -712,7 +712,7 @@
<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels"> <storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
<sdkName>SDK_2.x_EVK-MIMXRT1064</sdkName> <sdkName>SDK_2.x_EVK-MIMXRT1064</sdkName>
<sdkVersion>2.13.0</sdkVersion> <sdkVersion>2.13.0</sdkVersion>
<sdkComponents>platform.drivers.clock.MIMXRT1064;platform.drivers.xip_device.MIMXRT1064;platform.drivers.igpio.MIMXRT1064;platform.drivers.common.MIMXRT1064;platform.drivers.lpuart.MIMXRT1064;platform.drivers.iomuxc.MIMXRT1064;platform.drivers.lpi2c.MIMXRT1064;platform.drivers.trng.MIMXRT1064;platform.drivers.csi.MIMXRT1064;device.MIMXRT1064_CMSIS.MIMXRT1064;device.MIMXRT1064_system.MIMXRT1064;CMSIS_Include_core_cm.MIMXRT1064;platform.drivers.xip_board.evkmimxrt1064.MIMXRT1064;project_template.evkmimxrt1064.MIMXRT1064;device.MIMXRT1064_startup.MIMXRT1064;platform.drivers.dcp.MIMXRT1064;middleware.baremetal.MIMXRT1064;platform.drivers.flexio.MIMXRT1064;</sdkComponents> <sdkComponents>platform.drivers.clock.MIMXRT1064;platform.drivers.xip_device.MIMXRT1064;platform.drivers.igpio.MIMXRT1064;platform.drivers.common.MIMXRT1064;platform.drivers.lpuart.MIMXRT1064;platform.drivers.iomuxc.MIMXRT1064;platform.drivers.lpi2c.MIMXRT1064;platform.drivers.trng.MIMXRT1064;platform.drivers.csi.MIMXRT1064;device.MIMXRT1064_CMSIS.MIMXRT1064;device.MIMXRT1064_system.MIMXRT1064;CMSIS_Include_core_cm.MIMXRT1064;platform.drivers.xip_board.evkmimxrt1064.MIMXRT1064;device.MIMXRT1064_startup.MIMXRT1064;platform.drivers.dcp.MIMXRT1064;platform.drivers.flexio.MIMXRT1064;platform.drivers.lpspi.MIMXRT1064;</sdkComponents>
<boardId>evkmimxrt1064</boardId> <boardId>evkmimxrt1064</boardId>
<package>MIMXRT1064DVL6A</package> <package>MIMXRT1064DVL6A</package>
<core>cm7</core> <core>cm7</core>

310
nxp/board/board.c
View File

@ -8,10 +8,10 @@
#include "fsl_common.h" #include "fsl_common.h"
#include "fsl_lpuart.h" #include "fsl_lpuart.h"
#include "board.h" #include "board.h"
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
#include "fsl_lpi2c.h" #include "fsl_lpi2c.h"
#endif /* SDK_I2C_BASED_COMPONENT_USED */
#include "fsl_iomuxc.h" #include "fsl_iomuxc.h"
#include "fsl_trng.h"
#include "fsl_gpt.h"
/******************************************************************************* /*******************************************************************************
* Variables * Variables
@ -22,197 +22,179 @@
******************************************************************************/ ******************************************************************************/
/* Initialize debug console. */ /* Initialize debug console. */
void BOARD_InitDebugConsole(void) void BOARD_InitDebugConsole(void) {
{ lpuart_config_t cfg;
lpuart_config_t cfg; LPUART_GetDefaultConfig(&cfg);
LPUART_GetDefaultConfig(&cfg); cfg.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
cfg.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE; cfg.enableTx = 1;
cfg.enableTx = 1; LPUART_Init(BOARD_DEBUG_UART_BASEADDR, &cfg, BOARD_BOOTCLOCKRUN_UART_CLK_ROOT);
LPUART_Init(BOARD_DEBUG_UART_BASEADDR, &cfg, BOARD_BOOTCLOCKRUN_UART_CLK_ROOT);
} }
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED void BOARD_IO_Init() {
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz) lpi2c_master_config_t lpi2cConfig = {0};
{ LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
lpi2c_master_config_t lpi2cConfig = {0}; LPI2C_MasterInit(BOARD_CAMERA_I2C_BASEADDR, &lpi2cConfig, BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT);
LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
LPI2C_MasterInit(base, &lpi2cConfig, clkSrc_Hz); lpspi_master_config_t lpspiConfig = {0};
LPSPI_MasterGetDefaultConfig(&lpspiConfig);
lpspiConfig.baudRate = BOARD_LCD_BAUD_RATE;
lpspiConfig.pinCfg = kLPSPI_SdoInSdoOut;
lpspiConfig.cpol = kLPSPI_ClockPolarityActiveLow;
LPSPI_MasterInit(BOARD_LCD_SPI_BASEADDR, &lpspiConfig, BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT);
} }
status_t BOARD_LPI2C_Send(LPI2C_Type *base, void BOARD_Crypto_Init(dcp_handle_t* sha256_handle) {
uint8_t deviceAddress, trng_config_t trngConfig;
uint32_t subAddress, TRNG_GetDefaultConfig(&trngConfig);
uint8_t subAddressSize, TRNG_Init(TRNG, &trngConfig);
uint8_t *txBuff,
uint8_t txBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag; dcp_config_t dcpConfig;
xfer.slaveAddress = deviceAddress; DCP_GetDefaultConfig(&dcpConfig);
xfer.direction = kLPI2C_Write; DCP_Init(DCP, &dcpConfig);
xfer.subaddress = subAddress; sha256_handle->channel = kDCP_Channel0;
xfer.subaddressSize = subAddressSize;
xfer.data = txBuff;
xfer.dataSize = txBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
} }
status_t BOARD_LPI2C_Receive(LPI2C_Type *base, void BOARD_Timer_Init() {
uint8_t deviceAddress, gpt_config_t gptCfg;
uint32_t subAddress, GPT_GetDefaultConfig(&gptCfg);
uint8_t subAddressSize, gptCfg.clockSource = kGPT_ClockSource_Osc;
uint8_t *rxBuff, gptCfg.enableFreeRun = true;
uint8_t rxBuffSize) gptCfg.enableMode = true;
{ gptCfg.divider = 24;
lpi2c_master_transfer_t xfer; GPT_Init(GPT1, &gptCfg);
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Read;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = rxBuff;
xfer.dataSize = rxBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
} }
#endif /* SDK_I2C_BASED_COMPONENT_USED */
/* MPU configuration. */ /* MPU configuration. */
void BOARD_ConfigMPU(void) void BOARD_ConfigMPU(void) {
{
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
extern uint32_t Image$$RW_m_ncache$$Base[]; extern uint32_t Image$$RW_m_ncache$$Base[];
/* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */ /* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */
extern uint32_t Image$$RW_m_ncache_unused$$Base[]; extern uint32_t Image$$RW_m_ncache_unused$$Base[];
extern uint32_t Image$$RW_m_ncache_unused$$ZI$$Limit[]; extern uint32_t Image$$RW_m_ncache_unused$$ZI$$Limit[];
uint32_t nonCacheStart = (uint32_t)Image$$RW_m_ncache$$Base; uint32_t nonCacheStart = (uint32_t)Image$$RW_m_ncache$$Base;
uint32_t size = ((uint32_t)Image$$RW_m_ncache_unused$$Base == nonCacheStart) ? uint32_t size = ((uint32_t)Image$$RW_m_ncache_unused$$Base == nonCacheStart) ?
0 : 0 :
((uint32_t)Image$$RW_m_ncache_unused$$ZI$$Limit - nonCacheStart); ((uint32_t)Image$$RW_m_ncache_unused$$ZI$$Limit - nonCacheStart);
#elif defined(__MCUXPRESSO) #elif defined(__MCUXPRESSO)
extern uint32_t __base_NCACHE_REGION; extern uint32_t __base_NCACHE_REGION;
extern uint32_t __top_NCACHE_REGION; extern uint32_t __top_NCACHE_REGION;
uint32_t nonCacheStart = (uint32_t)(&__base_NCACHE_REGION); uint32_t nonCacheStart = (uint32_t)(&__base_NCACHE_REGION);
uint32_t size = (uint32_t)(&__top_NCACHE_REGION) - nonCacheStart; __attribute__((unused)) uint32_t size = (uint32_t)(&__top_NCACHE_REGION) - nonCacheStart;
#elif defined(__ICCARM__) || defined(__GNUC__) #elif defined(__ICCARM__) || defined(__GNUC__)
extern uint32_t __NCACHE_REGION_START[]; extern uint32_t __NCACHE_REGION_START[];
extern uint32_t __NCACHE_REGION_SIZE[]; extern uint32_t __NCACHE_REGION_SIZE[];
uint32_t nonCacheStart = (uint32_t)__NCACHE_REGION_START; uint32_t nonCacheStart = (uint32_t)__NCACHE_REGION_START;
uint32_t size = (uint32_t)__NCACHE_REGION_SIZE; uint32_t size = (uint32_t)__NCACHE_REGION_SIZE;
#endif #endif
/* Disable I cache and D cache */ /* Disable I cache and D cache */
if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) {
{ SCB_DisableICache();
SCB_DisableICache(); }
}
if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR))
{
SCB_DisableDCache();
}
/* Disable MPU */ if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR)) {
ARM_MPU_Disable(); SCB_DisableDCache();
}
/* MPU configure: /* Disable MPU */
* Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, ARM_MPU_Disable();
* SubRegionDisable, Size)
* API in mpu_armv7.h.
* param DisableExec Instruction access (XN) disable bit,0=instruction fetches enabled, 1=instruction fetches
* disabled.
* param AccessPermission Data access permissions, allows you to configure read/write access for User and
* Privileged mode.
* Use MACROS defined in mpu_armv7.h:
* ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
* Combine TypeExtField/IsShareable/IsCacheable/IsBufferable to configure MPU memory access attributes.
* TypeExtField IsShareable IsCacheable IsBufferable Memory Attribute Shareability Cache
* 0 x 0 0 Strongly Ordered shareable
* 0 x 0 1 Device shareable
* 0 0 1 0 Normal not shareable Outer and inner write
* through no write allocate
* 0 0 1 1 Normal not shareable Outer and inner write
* back no write allocate
* 0 1 1 0 Normal shareable Outer and inner write
* through no write allocate
* 0 1 1 1 Normal shareable Outer and inner write
* back no write allocate
* 1 0 0 0 Normal not shareable outer and inner
* noncache
* 1 1 0 0 Normal shareable outer and inner
* noncache
* 1 0 1 1 Normal not shareable outer and inner write
* back write/read acllocate
* 1 1 1 1 Normal shareable outer and inner write
* back write/read acllocate
* 2 x 0 0 Device not shareable
* Above are normal use settings, if your want to see more details or want to config different inner/outter cache
* policy.
* please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide <dui0646b_cortex_m7_dgug.pdf>
* param SubRegionDisable Sub-region disable field. 0=sub-region is enabled, 1=sub-region is disabled.
* param Size Region size of the region to be configured. use ARM_MPU_REGION_SIZE_xxx MACRO in
* mpu_armv7.h.
*/
/*
* Add default region to deny access to whole address space to workaround speculative prefetch.
* Refer to Arm errata 1013783-B for more details.
*
*/
/* Region 0 setting: Instruction access disabled, No data access permission. */
MPU->RBAR = ARM_MPU_RBAR(0, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_NONE, 0, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4GB);
/* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */ /* MPU configure:
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U); * Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable,
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); * SubRegionDisable, Size)
* API in mpu_armv7.h.
* param DisableExec Instruction access (XN) disable bit,0=instruction fetches enabled, 1=instruction fetches
* disabled.
* param AccessPermission Data access permissions, allows you to configure read/write access for User and
* Privileged mode.
* Use MACROS defined in mpu_armv7.h:
* ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
* Combine TypeExtField/IsShareable/IsCacheable/IsBufferable to configure MPU memory access attributes.
* TypeExtField IsShareable IsCacheable IsBufferable Memory Attribute Shareability Cache
* 0 x 0 0 Strongly Ordered shareable
* 0 x 0 1 Device shareable
* 0 0 1 0 Normal not shareable Outer and inner write
* through no write allocate
* 0 0 1 1 Normal not shareable Outer and inner write
* back no write allocate
* 0 1 1 0 Normal shareable Outer and inner write
* through no write allocate
* 0 1 1 1 Normal shareable Outer and inner write
* back no write allocate
* 1 0 0 0 Normal not shareable outer and inner
* noncache
* 1 1 0 0 Normal shareable outer and inner
* noncache
* 1 0 1 1 Normal not shareable outer and inner write
* back write/read acllocate
* 1 1 1 1 Normal shareable outer and inner write
* back write/read acllocate
* 2 x 0 0 Device not shareable
* Above are normal use settings, if your want to see more details or want to config different inner/outter cache
* policy.
* please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide <dui0646b_cortex_m7_dgug.pdf>
* param SubRegionDisable Sub-region disable field. 0=sub-region is enabled, 1=sub-region is disabled.
* param Size Region size of the region to be configured. use ARM_MPU_REGION_SIZE_xxx MACRO in
* mpu_armv7.h.
*/
/*
* Add default region to deny access to whole address space to workaround speculative prefetch.
* Refer to Arm errata 1013783-B for more details.
*
*/
/* Region 0 setting: Instruction access disabled, No data access permission. */
MPU->RBAR = ARM_MPU_RBAR(0, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_NONE, 0, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4GB);
/* Region 2 setting: Memory with Device type, not shareable, non-cacheable. */ /* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U); MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
/* Region 2 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) #if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Region 3 setting: Memory with Normal type, not shareable, outer/inner write back. */ /* Region 3 setting: Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(3, 0x70000000U); MPU->RBAR = ARM_MPU_RBAR(3, 0x70000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_4MB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_4MB);
#endif #endif
/* Region 4 setting: Memory with Device type, not shareable, non-cacheable. */ /* Region 4 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U); MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */ /* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(5, 0x00000000U); MPU->RBAR = ARM_MPU_RBAR(5, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */ /* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(6, 0x20000000U); MPU->RBAR = ARM_MPU_RBAR(6, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */ /* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(7, 0x20200000U); MPU->RBAR = ARM_MPU_RBAR(7, 0x20200000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 0, 1, 0, ARM_MPU_REGION_SIZE_512KB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 0, 1, 0, ARM_MPU_REGION_SIZE_512KB);
/* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */ /* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(8, 0x20280000U); MPU->RBAR = ARM_MPU_RBAR(8, 0x20280000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 0, 1, 0, ARM_MPU_REGION_SIZE_256KB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 0, 1, 0, ARM_MPU_REGION_SIZE_256KB);
/* Region 9 setting: Memory with Normal type, not shareable, outer/inner write back */ /* Region 9 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U); MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
/* Region 10 setting: Memory with Device type, not shareable, non-cacheable */ /* Region 10 setting: Memory with Device type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(10, 0x40000000); MPU->RBAR = ARM_MPU_RBAR(10, 0x40000000);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB);
/* Region 11 setting: Memory with Device type, not shareable, non-cacheable */ /* Region 11 setting: Memory with Device type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(11, 0x42000000); MPU->RBAR = ARM_MPU_RBAR(11, 0x42000000);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1MB); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1MB);
/* Enable MPU */ /* Enable MPU */
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
/* Enable I cache and D cache */ /* Enable I cache and D cache */
SCB_EnableDCache(); SCB_EnableDCache();
SCB_EnableICache(); SCB_EnableICache();
} }

51
nxp/board/board.h
View File

@ -12,19 +12,15 @@
#include "fsl_common.h" #include "fsl_common.h"
#include "fsl_gpio.h" #include "fsl_gpio.h"
#include "fsl_clock.h" #include "fsl_clock.h"
#include "fsl_dcp.h"
#include "fsl_lpspi.h"
#include "pin_mux.h"
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "MIMXRT1064-EVK"
/* The UART to use for debug messages. */ /* The UART to use for debug messages. */
#define BOARD_DEBUG_UART_BASEADDR LPUART1 #define BOARD_DEBUG_UART_BASEADDR BOARD_INITDEBUG_UART_UART1_TXD_PERIPHERAL
#define BOARD_DEBUG_UART_INSTANCE 1U
#define BOARD_UART_IRQ LPUART1_IRQn
#define BOARD_UART_IRQ_HANDLER LPUART1_IRQHandler
#ifndef BOARD_DEBUG_UART_BAUDRATE #ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE (115200U) #define BOARD_DEBUG_UART_BAUDRATE (115200U)
@ -34,10 +30,24 @@
#define BOARD_FLASH_SIZE (0x400000U) #define BOARD_FLASH_SIZE (0x400000U)
/* @Brief Board CAMERA configuration */ /* @Brief Board CAMERA configuration */
#define BOARD_CAMERA_I2C_BASEADDR LPI2C1 #define BOARD_CAMERA_I2C_BASEADDR BOARD_INITCAMERA_CSI_I2C_SDA_PERIPHERAL
#define BOARD_CAMERA_PWDN_GPIO GPIO1 #define BOARD_CAMERA_PWDN_GPIO BOARD_INITCAMERA_CSI_PWDN_PERIPHERAL
#define BOARD_CAMERA_PWDN_PIN 18 #define BOARD_CAMERA_PWDN_PIN BOARD_INITCAMERA_CSI_PWDN_CHANNEL
#define BOARD_CAMERA_RST_GPIO NULL
#define BOARD_CAMERA_RST_PIN 0
/* @Brief Board LCD configuration */
#define BOARD_LCD_SPI_BASEADDR BOARD_INITLCD_SD1_CMD_PERIPHERAL
#define BOARD_LCD_RST_GPIO BOARD_INITLCD_LCD_RESET_GPIO
#define BOARD_LCD_RST_PIN BOARD_INITLCD_LCD_RESET_GPIO_PIN
#define BOARD_LCD_CD_GPIO BOARD_INITLCD_LCD_CD_GPIO
#define BOARD_LCD_CD_PIN BOARD_INITLCD_LCD_CD_GPIO_PIN
#define BOARD_LCD_BAUD_RATE 5000000
#if defined(__cplusplus) #if defined(__cplusplus)
extern "C" { extern "C" {
@ -51,21 +61,10 @@ uint32_t BOARD_DebugConsoleSrcFreq(void);
void BOARD_InitDebugConsole(void); void BOARD_InitDebugConsole(void);
void BOARD_ConfigMPU(void); void BOARD_ConfigMPU(void);
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz); void BOARD_IO_Init();
status_t BOARD_LPI2C_Send(LPI2C_Type *base, void BOARD_Crypto_Init(dcp_handle_t* sha256_handle);
uint8_t deviceAddress, void BOARD_Timer_Init();
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
#endif
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif /* __cplusplus */ #endif /* __cplusplus */

220
nxp/board/pin_mux.c
View File

@ -109,7 +109,7 @@ pin_labels:
- {pin_num: L10, pin_signal: GPIO_AD_B0_15, label: 'CAN2_RX/U12[4]', identifier: CAN2_RX} - {pin_num: L10, pin_signal: GPIO_AD_B0_15, label: 'CAN2_RX/U12[4]', identifier: CAN2_RX}
- {pin_num: J11, pin_signal: GPIO_AD_B1_00, label: 'I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4]', identifier: I2C_SCL_FXOS8700CQ;CSI_I2C_SCL} - {pin_num: J11, pin_signal: GPIO_AD_B1_00, label: 'I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4]', identifier: I2C_SCL_FXOS8700CQ;CSI_I2C_SCL}
- {pin_num: K11, pin_signal: GPIO_AD_B1_01, label: 'I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6]', identifier: I2C_SDA_FXOS8700CQ;CSI_I2C_SDA} - {pin_num: K11, pin_signal: GPIO_AD_B1_01, label: 'I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6]', identifier: I2C_SDA_FXOS8700CQ;CSI_I2C_SDA}
- {pin_num: L11, pin_signal: GPIO_AD_B1_02, label: CSI_PWDN, identifier: SPDIF_OUT;CSI_PWDN} - {pin_num: L11, pin_signal: GPIO_AD_B1_02, label: CSI_PWDN, identifier: CSI_PWDN}
- {pin_num: M12, pin_signal: GPIO_AD_B1_03, label: 'SPDIF_IN/J22[8]', identifier: SPDIF_IN} - {pin_num: M12, pin_signal: GPIO_AD_B1_03, label: 'SPDIF_IN/J22[8]', identifier: SPDIF_IN}
- {pin_num: H13, pin_signal: GPIO_AD_B1_08, label: 'AUD_INT/CSI_D9//J35[13]/J22[4]', identifier: CSI_D9} - {pin_num: H13, pin_signal: GPIO_AD_B1_08, label: 'AUD_INT/CSI_D9//J35[13]/J22[4]', identifier: CSI_D9}
- {pin_num: M13, pin_signal: GPIO_AD_B1_09, label: 'SAI1_MCLK/CSI_D8/J35[11]', identifier: CSI_D8} - {pin_num: M13, pin_signal: GPIO_AD_B1_09, label: 'SAI1_MCLK/CSI_D8/J35[11]', identifier: CSI_D8}
@ -120,9 +120,9 @@ pin_labels:
- {pin_num: G12, pin_signal: GPIO_AD_B1_14, label: 'SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12]', identifier: CSI_D3} - {pin_num: G12, pin_signal: GPIO_AD_B1_14, label: 'SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12]', identifier: CSI_D3}
- {pin_num: J14, pin_signal: GPIO_AD_B1_15, label: 'SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13]', identifier: CSI_D2} - {pin_num: J14, pin_signal: GPIO_AD_B1_15, label: 'SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13]', identifier: CSI_D2}
- {pin_num: J4, pin_signal: GPIO_SD_B0_00, label: 'SD1_CMD/J24[6]', identifier: SD1_CMD} - {pin_num: J4, pin_signal: GPIO_SD_B0_00, label: 'SD1_CMD/J24[6]', identifier: SD1_CMD}
- {pin_num: J3, pin_signal: GPIO_SD_B0_01, label: 'SD1_CLK/J24[3]', identifier: SD1_CLK} - {pin_num: J3, pin_signal: GPIO_SD_B0_01, label: 'SD1_CLK/J24[3]', identifier: SD1_CLK;LCD_CD}
- {pin_num: J1, pin_signal: GPIO_SD_B0_02, label: 'SD1_D0/J24[4]/SPI_MOSI/PWM', identifier: SD1_D0} - {pin_num: J1, pin_signal: GPIO_SD_B0_02, label: 'SD1_D0/J24[4]/SPI_MOSI/PWM', identifier: SD1_D0}
- {pin_num: K1, pin_signal: GPIO_SD_B0_03, label: 'SD1_D1/J24[5]/SPI_MISO', identifier: SD1_D1} - {pin_num: K1, pin_signal: GPIO_SD_B0_03, label: 'SD1_D1/J24[5]/SPI_MISO', identifier: SD1_D1;LCD_RESET}
- {pin_num: H2, pin_signal: GPIO_SD_B0_04, label: SD1_D2, identifier: SD1_D2} - {pin_num: H2, pin_signal: GPIO_SD_B0_04, label: SD1_D2, identifier: SD1_D2}
- {pin_num: J2, pin_signal: GPIO_SD_B0_05, label: SD1_D3, identifier: SD1_D3} - {pin_num: J2, pin_signal: GPIO_SD_B0_05, label: SD1_D3, identifier: SD1_D3}
- {pin_num: L5, pin_signal: GPIO_SD_B1_00, label: FlexSPI_D3_B, identifier: FlexSPI_D3_B} - {pin_num: L5, pin_signal: GPIO_SD_B1_00, label: FlexSPI_D3_B, identifier: FlexSPI_D3_B}
@ -221,13 +221,15 @@ pin_labels:
* *
* END ****************************************************************************************************************/ * END ****************************************************************************************************************/
void BOARD_InitBootPins(void) { void BOARD_InitBootPins(void) {
BOARD_InitPins(); BOARD_InitISO7816();
BOARD_InitCSI(); BOARD_InitCamera();
BOARD_InitLCD();
BOARD_InitKeyboard();
} }
/* /*
* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins: BOARD_InitISO7816:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list: [] - pin_list: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
@ -235,11 +237,146 @@ BOARD_InitPins:
/* FUNCTION ************************************************************************************************************ /* FUNCTION ************************************************************************************************************
* *
* Function Name : BOARD_InitPins * Function Name : BOARD_InitISO7816
* Description : Configures pin routing and optionally pin electrical features. * Description : Configures pin routing and optionally pin electrical features.
* *
* END ****************************************************************************************************************/ * END ****************************************************************************************************************/
void BOARD_InitPins(void) { void BOARD_InitISO7816(void) {
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitCamera:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
- {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
- {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
- {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
- {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
- {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
- {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
- {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
- {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
- {pin_num: K12, peripheral: CSI, signal: csi_mclk, pin_signal: GPIO_AD_B1_05}
- {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06}
- {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07}
- {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00, identifier: CSI_I2C_SCL, software_input_on: Enable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
- {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01, identifier: CSI_I2C_SDA, software_input_on: Enable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
- {pin_num: L11, peripheral: GPIO1, signal: 'gpio_io, 18', pin_signal: GPIO_AD_B1_02, direction: OUTPUT, gpio_init_state: no_init}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitCamera
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitCamera(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
/* GPIO configuration of CSI_PWDN on GPIO_AD_B1_02 (pin L11) */
gpio_pin_config_t CSI_PWDN_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on GPIO_AD_B1_02 (pin L11) */
GPIO_PinInit(GPIO1, 18U, &CSI_PWDN_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPIO1_IO18, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_CSI_MCLK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_CSI_DATA09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_CSI_DATA08, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_CSI_DATA07, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_CSI_DATA06, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_CSI_DATA05, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_CSI_DATA04, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_CSI_DATA03, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_CSI_DATA02, 0U);
IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
(~(BOARD_INITCAMERA_IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK)))
| IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U)
);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0xD8B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0xD8B0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLCD:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: J1, peripheral: LPSPI1, signal: SDO, pin_signal: GPIO_SD_B0_02}
- {pin_num: J4, peripheral: LPSPI1, signal: SCK, pin_signal: GPIO_SD_B0_00}
- {pin_num: J3, peripheral: GPIO3, signal: 'gpio_io, 13', pin_signal: GPIO_SD_B0_01, identifier: LCD_CD, direction: OUTPUT, gpio_init_state: no_init}
- {pin_num: K1, peripheral: GPIO3, signal: 'gpio_io, 15', pin_signal: GPIO_SD_B0_03, identifier: LCD_RESET, direction: OUTPUT, gpio_init_state: 'true'}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitLCD
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitLCD(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
/* GPIO configuration of LCD_CD on GPIO_SD_B0_01 (pin J3) */
gpio_pin_config_t LCD_CD_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on GPIO_SD_B0_01 (pin J3) */
GPIO_PinInit(GPIO3, 13U, &LCD_CD_config);
/* GPIO configuration of LCD_RESET on GPIO_SD_B0_03 (pin K1) */
gpio_pin_config_t LCD_RESET_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 1U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on GPIO_SD_B0_03 (pin K1) */
GPIO_PinInit(GPIO3, 15U, &LCD_RESET_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_GPIO3_IO13, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_GPIO3_IO15, 0U);
IOMUXC_GPR->GPR28 = ((IOMUXC_GPR->GPR28 &
(~(BOARD_INITLCD_IOMUXC_GPR_GPR28_GPIO_MUX3_GPIO_SEL_MASK)))
| IOMUXC_GPR_GPR28_GPIO_MUX3_GPIO_SEL(0x00U)
);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitKeyboard:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitKeyboard
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitKeyboard(void) {
} }
@ -270,73 +407,6 @@ void BOARD_InitDEBUG_UART(void) {
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U); IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
} }
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitCSI:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
- {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
- {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
- {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
- {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
- {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
- {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
- {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
- {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
- {pin_num: K12, peripheral: CSI, signal: csi_mclk, pin_signal: GPIO_AD_B1_05}
- {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06}
- {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07}
- {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00, identifier: CSI_I2C_SCL, software_input_on: Enable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
- {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01, identifier: CSI_I2C_SDA, software_input_on: Enable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
- {pin_num: L11, peripheral: GPIO1, signal: 'gpio_io, 18', pin_signal: GPIO_AD_B1_02, identifier: CSI_PWDN, direction: OUTPUT, gpio_init_state: no_init}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitCSI
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitCSI(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
/* GPIO configuration of CSI_PWDN on GPIO_AD_B1_02 (pin L11) */
gpio_pin_config_t CSI_PWDN_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on GPIO_AD_B1_02 (pin L11) */
GPIO_PinInit(GPIO1, 18U, &CSI_PWDN_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPIO1_IO18, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_CSI_MCLK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_CSI_DATA09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_CSI_DATA08, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_CSI_DATA07, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_CSI_DATA06, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_CSI_DATA05, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_CSI_DATA04, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_CSI_DATA03, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_CSI_DATA02, 0U);
IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
(~(BOARD_INITCSI_IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK)))
| IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U)
);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0xD8B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0xD8B0U);
}
/*********************************************************************************************************************** /***********************************************************************************************************************
* EOF * EOF
**********************************************************************************************************************/ **********************************************************************************************************************/

254
nxp/board/pin_mux.h
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@ -41,7 +41,159 @@ void BOARD_InitBootPins(void);
* @brief Configures pin routing and optionally pin electrical features. * @brief Configures pin routing and optionally pin electrical features.
* *
*/ */
void BOARD_InitPins(void); void BOARD_InitISO7816(void);
#define BOARD_INITCAMERA_IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK 0x040000U /*!< GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: affected bits mask */
/* GPIO_AD_B1_08 (coord H13), AUD_INT/CSI_D9//J35[13]/J22[4] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D9_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D9_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D9_CHANNEL 9U /*!< Signal channel */
/* GPIO_AD_B1_09 (coord M13), SAI1_MCLK/CSI_D8/J35[11] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D8_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D8_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D8_CHANNEL 8U /*!< Signal channel */
/* GPIO_AD_B1_10 (coord L13), SAI1_RX_SYNC/CSI_D7/J35[9]/J23[1] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D7_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D7_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D7_CHANNEL 7U /*!< Signal channel */
/* GPIO_AD_B1_11 (coord J13), SAI1_RX_BCLK/CSI_D6/J35[7]/J23[2] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D6_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D6_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D6_CHANNEL 6U /*!< Signal channel */
/* GPIO_AD_B1_12 (coord H12), SAI1_RXD/CSI_D5/J35[5]/U13[16] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D5_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D5_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D5_CHANNEL 5U /*!< Signal channel */
/* GPIO_AD_B1_13 (coord H11), SAI1_TXD/CSI_D4/J35[3]/U13[14] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D4_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D4_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D4_CHANNEL 4U /*!< Signal channel */
/* GPIO_AD_B1_15 (coord J14), SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D2_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D2_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D2_CHANNEL 2U /*!< Signal channel */
/* GPIO_AD_B1_14 (coord G12), SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_D3_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_D3_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCAMERA_CSI_D3_CHANNEL 3U /*!< Signal channel */
/* GPIO_AD_B1_04 (coord L12), CSI_PIXCLK/J35[8]/J23[3] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_PIXCLK_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_PIXCLK_SIGNAL csi_pixclk /*!< Signal name */
/* GPIO_AD_B1_05 (coord K12), CSI_MCLK/J35[12]/J23[4] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_MCLK_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_MCLK_SIGNAL csi_mclk /*!< Signal name */
/* GPIO_AD_B1_06 (coord J12), CSI_VSYNC/J35[18]/J22[2]/UART_TX */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_VSYNC_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_VSYNC_SIGNAL csi_vsync /*!< Signal name */
/* GPIO_AD_B1_07 (coord K10), CSI_HSYNC/J35[16]/J22[1]/UART_RX */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_HSYNC_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_HSYNC_SIGNAL csi_hsync /*!< Signal name */
/* GPIO_AD_B1_00 (coord J11), I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_I2C_SCL_PERIPHERAL LPI2C1 /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_I2C_SCL_SIGNAL SCL /*!< Signal name */
/* GPIO_AD_B1_01 (coord K11), I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6] */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_I2C_SDA_PERIPHERAL LPI2C1 /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_I2C_SDA_SIGNAL SDA /*!< Signal name */
/* GPIO_AD_B1_02 (coord L11), CSI_PWDN */
/* Routed pin properties */
#define BOARD_INITCAMERA_CSI_PWDN_PERIPHERAL GPIO1 /*!< Peripheral name */
#define BOARD_INITCAMERA_CSI_PWDN_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITCAMERA_CSI_PWDN_CHANNEL 18U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITCAMERA_CSI_PWDN_GPIO GPIO1 /*!< GPIO peripheral base pointer */
#define BOARD_INITCAMERA_CSI_PWDN_GPIO_PIN 18U /*!< GPIO pin number */
#define BOARD_INITCAMERA_CSI_PWDN_GPIO_PIN_MASK (1U << 18U) /*!< GPIO pin mask */
#define BOARD_INITCAMERA_CSI_PWDN_PORT GPIO1 /*!< PORT peripheral base pointer */
#define BOARD_INITCAMERA_CSI_PWDN_PIN 18U /*!< PORT pin number */
#define BOARD_INITCAMERA_CSI_PWDN_PIN_MASK (1U << 18U) /*!< PORT pin mask */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitCamera(void);
#define BOARD_INITLCD_IOMUXC_GPR_GPR28_GPIO_MUX3_GPIO_SEL_MASK 0xA000U /*!< GPIO3 and GPIO8 share same IO MUX function, GPIO_MUX3 selects one GPIO function: affected bits mask */
/* GPIO_SD_B0_02 (coord J1), SD1_D0/J24[4]/SPI_MOSI/PWM */
/* Routed pin properties */
#define BOARD_INITLCD_SD1_D0_PERIPHERAL LPSPI1 /*!< Peripheral name */
#define BOARD_INITLCD_SD1_D0_SIGNAL SDO /*!< Signal name */
/* GPIO_SD_B0_00 (coord J4), SD1_CMD/J24[6] */
/* Routed pin properties */
#define BOARD_INITLCD_SD1_CMD_PERIPHERAL LPSPI1 /*!< Peripheral name */
#define BOARD_INITLCD_SD1_CMD_SIGNAL SCK /*!< Signal name */
/* GPIO_SD_B0_01 (coord J3), SD1_CLK/J24[3] */
/* Routed pin properties */
#define BOARD_INITLCD_LCD_CD_PERIPHERAL GPIO3 /*!< Peripheral name */
#define BOARD_INITLCD_LCD_CD_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITLCD_LCD_CD_CHANNEL 13U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLCD_LCD_CD_GPIO GPIO3 /*!< GPIO peripheral base pointer */
#define BOARD_INITLCD_LCD_CD_GPIO_PIN 13U /*!< GPIO pin number */
#define BOARD_INITLCD_LCD_CD_GPIO_PIN_MASK (1U << 13U) /*!< GPIO pin mask */
#define BOARD_INITLCD_LCD_CD_PORT GPIO3 /*!< PORT peripheral base pointer */
#define BOARD_INITLCD_LCD_CD_PIN 13U /*!< PORT pin number */
#define BOARD_INITLCD_LCD_CD_PIN_MASK (1U << 13U) /*!< PORT pin mask */
/* GPIO_SD_B0_03 (coord K1), SD1_D1/J24[5]/SPI_MISO */
/* Routed pin properties */
#define BOARD_INITLCD_LCD_RESET_PERIPHERAL GPIO3 /*!< Peripheral name */
#define BOARD_INITLCD_LCD_RESET_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITLCD_LCD_RESET_CHANNEL 15U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLCD_LCD_RESET_GPIO GPIO3 /*!< GPIO peripheral base pointer */
#define BOARD_INITLCD_LCD_RESET_GPIO_PIN 15U /*!< GPIO pin number */
#define BOARD_INITLCD_LCD_RESET_GPIO_PIN_MASK (1U << 15U) /*!< GPIO pin mask */
#define BOARD_INITLCD_LCD_RESET_PORT GPIO3 /*!< PORT peripheral base pointer */
#define BOARD_INITLCD_LCD_RESET_PIN 15U /*!< PORT pin number */
#define BOARD_INITLCD_LCD_RESET_PIN_MASK (1U << 15U) /*!< PORT pin mask */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitLCD(void);
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitKeyboard(void);
/* GPIO_AD_B0_12 (coord K14), UART1_TXD */ /* GPIO_AD_B0_12 (coord K14), UART1_TXD */
/* Routed pin properties */ /* Routed pin properties */
@ -59,106 +211,6 @@ void BOARD_InitPins(void);
*/ */
void BOARD_InitDEBUG_UART(void); void BOARD_InitDEBUG_UART(void);
#define BOARD_INITCSI_IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK 0x040000U /*!< GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: affected bits mask */
/* GPIO_AD_B1_08 (coord H13), AUD_INT/CSI_D9//J35[13]/J22[4] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D9_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D9_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D9_CHANNEL 9U /*!< Signal channel */
/* GPIO_AD_B1_09 (coord M13), SAI1_MCLK/CSI_D8/J35[11] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D8_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D8_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D8_CHANNEL 8U /*!< Signal channel */
/* GPIO_AD_B1_10 (coord L13), SAI1_RX_SYNC/CSI_D7/J35[9]/J23[1] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D7_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D7_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D7_CHANNEL 7U /*!< Signal channel */
/* GPIO_AD_B1_11 (coord J13), SAI1_RX_BCLK/CSI_D6/J35[7]/J23[2] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D6_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D6_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D6_CHANNEL 6U /*!< Signal channel */
/* GPIO_AD_B1_12 (coord H12), SAI1_RXD/CSI_D5/J35[5]/U13[16] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D5_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D5_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D5_CHANNEL 5U /*!< Signal channel */
/* GPIO_AD_B1_13 (coord H11), SAI1_TXD/CSI_D4/J35[3]/U13[14] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D4_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D4_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D4_CHANNEL 4U /*!< Signal channel */
/* GPIO_AD_B1_15 (coord J14), SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D2_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D2_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D2_CHANNEL 2U /*!< Signal channel */
/* GPIO_AD_B1_14 (coord G12), SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_D3_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_D3_SIGNAL csi_data /*!< Signal name */
#define BOARD_INITCSI_CSI_D3_CHANNEL 3U /*!< Signal channel */
/* GPIO_AD_B1_04 (coord L12), CSI_PIXCLK/J35[8]/J23[3] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_PIXCLK_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_PIXCLK_SIGNAL csi_pixclk /*!< Signal name */
/* GPIO_AD_B1_05 (coord K12), CSI_MCLK/J35[12]/J23[4] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_MCLK_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_MCLK_SIGNAL csi_mclk /*!< Signal name */
/* GPIO_AD_B1_06 (coord J12), CSI_VSYNC/J35[18]/J22[2]/UART_TX */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_VSYNC_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_VSYNC_SIGNAL csi_vsync /*!< Signal name */
/* GPIO_AD_B1_07 (coord K10), CSI_HSYNC/J35[16]/J22[1]/UART_RX */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_HSYNC_PERIPHERAL CSI /*!< Peripheral name */
#define BOARD_INITCSI_CSI_HSYNC_SIGNAL csi_hsync /*!< Signal name */
/* GPIO_AD_B1_00 (coord J11), I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_I2C_SCL_PERIPHERAL LPI2C1 /*!< Peripheral name */
#define BOARD_INITCSI_CSI_I2C_SCL_SIGNAL SCL /*!< Signal name */
/* GPIO_AD_B1_01 (coord K11), I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6] */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_I2C_SDA_PERIPHERAL LPI2C1 /*!< Peripheral name */
#define BOARD_INITCSI_CSI_I2C_SDA_SIGNAL SDA /*!< Signal name */
/* GPIO_AD_B1_02 (coord L11), CSI_PWDN */
/* Routed pin properties */
#define BOARD_INITCSI_CSI_PWDN_PERIPHERAL GPIO1 /*!< Peripheral name */
#define BOARD_INITCSI_CSI_PWDN_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITCSI_CSI_PWDN_CHANNEL 18U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITCSI_CSI_PWDN_GPIO GPIO1 /*!< GPIO peripheral base pointer */
#define BOARD_INITCSI_CSI_PWDN_GPIO_PIN 18U /*!< GPIO pin number */
#define BOARD_INITCSI_CSI_PWDN_GPIO_PIN_MASK (1U << 18U) /*!< GPIO pin mask */
#define BOARD_INITCSI_CSI_PWDN_PORT GPIO1 /*!< PORT peripheral base pointer */
#define BOARD_INITCSI_CSI_PWDN_PIN 18U /*!< PORT pin number */
#define BOARD_INITCSI_CSI_PWDN_PIN_MASK (1U << 18U) /*!< PORT pin mask */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitCSI(void);
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif

2421
nxp/drivers/fsl_lpspi.c Normal file
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1158
nxp/drivers/fsl_lpspi.h Normal file
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238
nxp/nxp.mex
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@ -132,9 +132,9 @@
<pin_label pin_num="G12" pin_signal="GPIO_AD_B1_14" label="SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12]" identifier="CSI_D3"/> <pin_label pin_num="G12" pin_signal="GPIO_AD_B1_14" label="SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12]" identifier="CSI_D3"/>
<pin_label pin_num="J14" pin_signal="GPIO_AD_B1_15" label="SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13]" identifier="CSI_D2"/> <pin_label pin_num="J14" pin_signal="GPIO_AD_B1_15" label="SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13]" identifier="CSI_D2"/>
<pin_label pin_num="J4" pin_signal="GPIO_SD_B0_00" label="SD1_CMD/J24[6]" identifier="SD1_CMD"/> <pin_label pin_num="J4" pin_signal="GPIO_SD_B0_00" label="SD1_CMD/J24[6]" identifier="SD1_CMD"/>
<pin_label pin_num="J3" pin_signal="GPIO_SD_B0_01" label="SD1_CLK/J24[3]" identifier="SD1_CLK"/> <pin_label pin_num="J3" pin_signal="GPIO_SD_B0_01" label="SD1_CLK/J24[3]" identifier="SD1_CLK;LCD_CD"/>
<pin_label pin_num="J1" pin_signal="GPIO_SD_B0_02" label="SD1_D0/J24[4]/SPI_MOSI/PWM" identifier="SD1_D0"/> <pin_label pin_num="J1" pin_signal="GPIO_SD_B0_02" label="SD1_D0/J24[4]/SPI_MOSI/PWM" identifier="SD1_D0"/>
<pin_label pin_num="K1" pin_signal="GPIO_SD_B0_03" label="SD1_D1/J24[5]/SPI_MISO" identifier="SD1_D1"/> <pin_label pin_num="K1" pin_signal="GPIO_SD_B0_03" label="SD1_D1/J24[5]/SPI_MISO" identifier="SD1_D1;LCD_RESET"/>
<pin_label pin_num="H2" pin_signal="GPIO_SD_B0_04" label="SD1_D2" identifier="SD1_D2"/> <pin_label pin_num="H2" pin_signal="GPIO_SD_B0_04" label="SD1_D2" identifier="SD1_D2"/>
<pin_label pin_num="J2" pin_signal="GPIO_SD_B0_05" label="SD1_D3" identifier="SD1_D3"/> <pin_label pin_num="J2" pin_signal="GPIO_SD_B0_05" label="SD1_D3" identifier="SD1_D3"/>
<pin_label pin_num="L5" pin_signal="GPIO_SD_B1_00" label="FlexSPI_D3_B" identifier="FlexSPI_D3_B"/> <pin_label pin_num="L5" pin_signal="GPIO_SD_B1_00" label="FlexSPI_D3_B" identifier="FlexSPI_D3_B"/>
@ -225,7 +225,7 @@
<power_domains/> <power_domains/>
</pins_profile> </pins_profile>
<functions_list> <functions_list>
<function name="BOARD_InitPins"> <function name="BOARD_InitISO7816">
<description>Configures pin routing and optionally pin electrical features.</description> <description>Configures pin routing and optionally pin electrical features.</description>
<options> <options>
<callFromInitBoot>true</callFromInitBoot> <callFromInitBoot>true</callFromInitBoot>
@ -233,7 +233,154 @@
<enableClock>true</enableClock> <enableClock>true</enableClock>
</options> </options>
<dependencies> <dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins"> <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitISO7816">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins/>
</function>
<function name="BOARD_InitCamera">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCamera">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCamera">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCamera">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCamera">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitCamera">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
<pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
<pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
<pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
<pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
<pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
<pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
<pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
<pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
<pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
<pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
<pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
<pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
<pin_features>
<pin_feature name="identifier" value="CSI_I2C_SCL"/>
<pin_feature name="software_input_on" value="Enable"/>
<pin_feature name="hysteresis_enable" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="pull_keeper_enable" value="Enable"/>
<pin_feature name="open_drain" value="Enable"/>
<pin_feature name="speed" value="MHZ_100"/>
<pin_feature name="drive_strength" value="R0_6"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
<pin_features>
<pin_feature name="identifier" value="CSI_I2C_SDA"/>
<pin_feature name="software_input_on" value="Enable"/>
<pin_feature name="hysteresis_enable" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="pull_keeper_enable" value="Enable"/>
<pin_feature name="open_drain" value="Enable"/>
<pin_feature name="speed" value="MHZ_100"/>
<pin_feature name="drive_strength" value="R0_6"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="GPIO1" signal="gpio_io, 18" pin_num="L11" pin_signal="GPIO_AD_B1_02">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="no_init"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitLCD">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPSPI1" description="Peripheral LPSPI1 is not initialized" problem_level="1" source="Pins:BOARD_InitLCD">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCD">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCD">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLCD">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="LPSPI1" signal="SDO" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
<pin peripheral="LPSPI1" signal="SCK" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
<pin peripheral="GPIO3" signal="gpio_io, 13" pin_num="J3" pin_signal="GPIO_SD_B0_01">
<pin_features>
<pin_feature name="identifier" value="LCD_CD"/>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="no_init"/>
</pin_features>
</pin>
<pin peripheral="GPIO3" signal="gpio_io, 15" pin_num="K1" pin_signal="GPIO_SD_B0_03">
<pin_features>
<pin_feature name="identifier" value="LCD_RESET"/>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitKeyboard">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitKeyboard">
<feature name="enabled" evaluation="equal" configuration="core0"> <feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data> <data>true</data>
</feature> </feature>
@ -294,89 +441,6 @@
</pin> </pin>
</pins> </pins>
</function> </function>
<function name="BOARD_InitCSI">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSI">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSI">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSI">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSI">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitCSI">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
<pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
<pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
<pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
<pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
<pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
<pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
<pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
<pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
<pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
<pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
<pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
<pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
<pin_features>
<pin_feature name="identifier" value="CSI_I2C_SCL"/>
<pin_feature name="software_input_on" value="Enable"/>
<pin_feature name="hysteresis_enable" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="pull_keeper_enable" value="Enable"/>
<pin_feature name="open_drain" value="Enable"/>
<pin_feature name="speed" value="MHZ_100"/>
<pin_feature name="drive_strength" value="R0_6"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
<pin_features>
<pin_feature name="identifier" value="CSI_I2C_SDA"/>
<pin_feature name="software_input_on" value="Enable"/>
<pin_feature name="hysteresis_enable" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="pull_keeper_enable" value="Enable"/>
<pin_feature name="open_drain" value="Enable"/>
<pin_feature name="speed" value="MHZ_100"/>
<pin_feature name="drive_strength" value="R0_6"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="GPIO1" signal="gpio_io, 18" pin_num="L11" pin_signal="GPIO_AD_B1_02">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="no_init"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list> </functions_list>
</pins> </pins>
<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true"> <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">

58
nxp/source/nxp.c
View File

@ -43,6 +43,8 @@
#include "fsl_lpuart.h" #include "fsl_lpuart.h"
#include "fsl_dcp.h" #include "fsl_dcp.h"
#include "fsl_gpt.h" #include "fsl_gpt.h"
#include "fsl_lpi2c.h"
#include "fsl_lpspi.h"
#include "hal.h" #include "hal.h"
struct gpio_pin_spec { struct gpio_pin_spec {
@ -52,7 +54,9 @@ struct gpio_pin_spec {
struct gpio_pin_spec NXP_PIN_MAP[] = { struct gpio_pin_spec NXP_PIN_MAP[] = {
{BOARD_CAMERA_PWDN_GPIO, BOARD_CAMERA_PWDN_PIN}, {BOARD_CAMERA_PWDN_GPIO, BOARD_CAMERA_PWDN_PIN},
{NULL, 0}, //{BOARD_CAMERA_RST_GPIO, BOARD_CAMERA_RST_PIN}, {BOARD_CAMERA_RST_GPIO, BOARD_CAMERA_RST_PIN},
{BOARD_LCD_CD_GPIO, BOARD_LCD_CD_PIN},
{BOARD_LCD_RST_GPIO, BOARD_LCD_RST_PIN},
}; };
static dcp_handle_t sha256_handle; static dcp_handle_t sha256_handle;
@ -67,35 +71,49 @@ hal_err_t hal_init(void) {
BOARD_InitDebugConsole(); BOARD_InitDebugConsole();
#endif #endif
BOARD_LPI2C_Init(BOARD_CAMERA_I2C_BASEADDR, BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT); BOARD_IO_Init();
trng_config_t trngConfig;
TRNG_GetDefaultConfig(&trngConfig);
TRNG_Init(TRNG, &trngConfig);
dcp_config_t dcpConfig; BOARD_Crypto_Init(&sha256_handle);
DCP_GetDefaultConfig(&dcpConfig); BOARD_Timer_Init();
DCP_Init(DCP, &dcpConfig);
sha256_handle.channel = kDCP_Channel0;
gpt_config_t gptCfg;
GPT_GetDefaultConfig(&gptCfg);
gptCfg.clockSource = kGPT_ClockSource_Osc;
gptCfg.enableFreeRun = true;
gptCfg.enableMode = true;
gptCfg.divider = 24;
GPT_Init(GPT1, &gptCfg);
return HAL_OK; return HAL_OK;
} }
hal_err_t hal_i2c_send(hal_i2c_port_t port, uint8_t addr, const uint8_t* data, size_t len) { hal_err_t hal_i2c_send(hal_i2c_port_t port, uint8_t addr, const uint8_t* data, size_t len) {
assert(port == I2C_CAMERA); assert(port == I2C_CAMERA);
return BOARD_LPI2C_Send(BOARD_CAMERA_I2C_BASEADDR, addr, 0, 0, (uint8_t*) data, len) == kStatus_Success ? HAL_OK : HAL_ERROR;
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = addr;
xfer.direction = kLPI2C_Write;
xfer.subaddress = 0;
xfer.subaddressSize = 0;
xfer.data = (uint8_t*) data;
xfer.dataSize = len;
return LPI2C_MasterTransferBlocking(BOARD_CAMERA_I2C_BASEADDR, &xfer) == kStatus_Success ? HAL_OK : HAL_ERROR;
}
hal_err_t hal_spi_send(hal_spi_port_t port, const uint8_t* data, size_t len) {
assert(port == SPI_LCD);
lpspi_transfer_t xfer = { 0 };
xfer.txData = (uint8_t*) data;
xfer.dataSize = len;
return LPSPI_MasterTransferBlocking(BOARD_LCD_SPI_BASEADDR, &xfer) == kStatus_Success ? HAL_OK : HAL_ERROR;
}
hal_err_t hal_spi_send_dma(hal_spi_port_t port, const uint8_t* data, size_t len) {
return HAL_ERROR;
} }
hal_err_t hal_gpio_set(hal_gpio_pin_t pin, hal_gpio_state_t state) { hal_err_t hal_gpio_set(hal_gpio_pin_t pin, hal_gpio_state_t state) {
if (pin == GPIO_CAMERA_RST) return HAL_OK; // dev board does not connect this PIN, will connect in real board though if (NXP_PIN_MAP[pin].base == NULL) {
return HAL_OK; // unconnected PIN
}
GPIO_WritePinOutput(NXP_PIN_MAP[pin].base, NXP_PIN_MAP[pin].pin, state); GPIO_WritePinOutput(NXP_PIN_MAP[pin].base, NXP_PIN_MAP[pin].pin, state);
return HAL_OK; return HAL_OK;
} }