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56e0289318
* Update release number to 97.
Public Issues:
* Add a special case to the <<renderpass-compatibility, Render Pass
Compatibility>> rules allowing single-subpass renderpasses to be
compatible even if they have different resolve attachment references
(public issue 835).
* Fix the miss shader binding table record address rule in the
<<shader-binding-table-indexing-rules, Miss Shaders>> section to index
by code:missIndex, not code:sbtOffset (public issue 875).
Internal Issues:
* Add a missing anchor to the elink:VkSamplerCreateFlagBits language
(internal issue 1483).
* Add missing implicit valid usage include for slink:VkHdrMetadataEXT and
corresponding `noautovalidity` attributes in `vk.xml` for the
externally-defined metadata properties (internal issue 1514).
* Remove restrictions on the `mask` parameter of SPIR-V's
code:OpGroupNonUniformXor in the <<spirvenv-module-validation,
Validation Rules within a Module>> appendix (internal merge request
2971).
* Restore `noautovalidity` attribute for
slink:VkPipelineViewportWScalingStateCreateInfoNV::pname:pViewportWScalings
in `vk.xml` (internal merge request 2975).
* Update copyright dates on Khronos-copyrighted files to 2019 (internal
merge request 2980).
New Extensions:
* `VK_KHR_depth_stencil_resolve`
* `VK_EXT_buffer_device_address`
* `VK_EXT_memory_budget`
* `VK_EXT_memory_priority`
* `VK_EXT_validation_features`
103 lines
3.3 KiB
Plaintext
103 lines
3.3 KiB
Plaintext
// Copyright (c) 2014-2019 Khronos Group. This work is licensed under a
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// Creative Commons Attribution 4.0 International License; see
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// http://creativecommons.org/licenses/by/4.0/
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include::meta/VK_KHR_shader_float_controls.txt[]
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*Last Modified Date*::
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2018-09-11
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*IP Status*::
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No known IP claims.
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*Interactions and External Dependencies*::
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- This extension requires
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https://www.khronos.org/registry/spir-v/extensions/KHR/SPV_KHR_float_controls.html[`SPV_KHR_float_controls`]
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*Contributors*::
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- Alexander Galazin, Arm
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- Jan-Harald Fredriksen, Arm
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- Jeff Bolz, NVIDIA
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- Graeme Leese, Broadcom
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- Daniel Rakos, AMD
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=== Description
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The `VK_KHR_shader_float_controls` extension enables efficient use of
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floating-point computations through the ability to query and override the
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implementation's default behavior for rounding modes, denormals, signed
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zero, and infinity.
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=== New Enum Constants
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* Extending elink:VkStructureType:
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** ename:VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR
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=== New Enums
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* None
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=== New Structures
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* slink:VkPhysicalDeviceFloatControlsPropertiesKHR
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=== New Functions
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* None
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=== New SPIR-V Capabilities
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* <<spirvenv-capabilities-table-shaderfloatcontrols,code:DenormPreserve>>
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* <<spirvenv-capabilities-table-shaderfloatcontrols,code:DenormFlushToZero>>
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* <<spirvenv-capabilities-table-shaderfloatcontrols,code:SignedZeroInfNanPreserve>>
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* <<spirvenv-capabilities-table-shaderfloatcontrols,code:RoundingModeRTE>>
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* <<spirvenv-capabilities-table-shaderfloatcontrols,code:RoundingModeRTZ>>
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=== Issues
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1) Which instructions must flush denorms?
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*RESOLVED*: Only floating-point conversion, floating-point arithmetic,
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floating-point relational (except code:OpIsNaN, code:OpIsInf), and
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floating-point GLSL.std.450 extended instructions must flush denormals.
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2) What is the denorm behavior for intermediate results?
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*RESOLVED*: When a SPIR-V instruction is implemented as a sequence of other
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instructions:
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- in the code:DenormFlushToZero execution mode the intermediate
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instructions may flush denormals, the final result of the sequence must:
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not be denormal.
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- in the code:DenormPreserve execution mode denormals must be preserved
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throughout the whole sequence.
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3) Do denorm and rounding mode controls apply to code:OpSpecConstantOp?
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*RESOLVED*: Yes, except when the opcode is code:OpQuantizeToF16.
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4) The SPIR-V specification says that code:OpConvertFToU and
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code:OpConvertFToS unconditionally round towards zero.
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Do the rounding mode controls specified through the execution modes apply to
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them?
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*RESOLVED*: No, these instructions unconditionally round towards zero.
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5) Do any of the "Pack" GLSL.std.450 instructions count as conversion
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instructions and have the rounding mode apply?
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*RESOLVED*: No, only instructions listed in the section "3.32.11.
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Conversion Instructions" of the SPIR-V specification count as conversion
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instructions.
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6) When using inf/nan-ignore mode, what is expected of code:OpIsNan and
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code:OpIsInf?
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*RESOLVED*: These instructions must always accurately detect inf/nan if it
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is passed to them.
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=== Version History
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* Revision 3, 2018-09-11 (Alexander Galazin)
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- Minor restructuring
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* Revision 2, 2018-04-17 (Alexander Galazin)
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- Added issues and resolutions
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* Revision 1, 2018-04-11 (Alexander Galazin)
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- Initial draft
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