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14 Commits

Author SHA1 Message Date
Hamish Ivey-Law
1c87fbb712
EVM shift left/right operations (#801) 
* First parts of shift implementation.

* Disable range check errors.

* Tidy up ASM.

* Update comments; fix some .sum() expressions.

* First full draft of shift left/right.

* Missed a +1.

* Clippy.

* Address Jacqui's comments.

* Add comment.

* Fix missing filter.

* Address second round of comments from Jacqui.
 2022-11-09 10:47:15 +11:00
Jacqueline Nabaglo
ec3391f9c4
Add Fp254 ops to the CPU table (#779) 
* Add Fp254 ops to the CPU table

* Add forgotten file
 2022-10-13 14:02:19 -07:00
Jacqueline Nabaglo
d5cf53c227
Constraints for dup/swap (#743) 
* Constraints for dup/swap

* Minor comments

* Daniel comments

* More comments
 2022-10-03 12:31:43 -07:00
Jacqueline Nabaglo
e978425b26
Connect stack to memory (#735) 
* Connect stack to memory

* Daniel PR comment
 2022-09-28 15:18:56 -07:00
Jacqueline Nabaglo
084700a7f4
Memory channel for program counter (#717) 2022-09-22 18:09:23 -07:00
Jacqueline Nabaglo
cae5f4870c
Stack pointer + underflow/overflow checks (#710) 
* Stack pointer + underflow/overflow checks

* Daniel comments

* Extra docs
 2022-09-10 13:20:30 -07:00
Daniel Lubarov
aa87f2c3ba Public memory 2022-08-25 20:19:18 -07:00
Jacqueline Nabaglo
b98dd47820
Permission levels, jumps, traps (#653) 
* Permission levels, jumps, traps

* Tests passing

* PR comments + documentation

* Docs + minor bugfixes

* Tests

* Use already-defined `stop` and `exception` (but renamed to `sys_stop`, `fault_exception`)

* Daniel comments
 2022-08-16 09:46:10 -07:00
Jacqueline Nabaglo
c160c4032d
Inter-row program counter constraints (#639) 
* Beginning of control flow support

* Fixes to halt spin loop
 2022-07-27 11:36:33 -07:00
Daniel Lubarov
e7b480deaf Begin work on witness generation and kernel bootstrapping 2022-07-01 10:09:57 -07:00
Daniel Lubarov
2e818172f0
Parse and assemble kernel functions (#567) 
* Parse and assemble kernel functions

Written in "EVM++" assembly. Later on we will add some priviledged opcodes (in unused opcode ordinals), making it an extension of EVM bytecode.

I don't think there's much of a standard for EVM assembly, but I loosely based the syntax on this [proposal](https://gist.github.com/axic/17ddbbce4738ccf4040d30cbb5de484e).

* PR feedback

* tweaks for consistency

* terminology tweaks

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>
 2022-06-20 20:32:29 -07:00
Jacqueline Nabaglo
49219a2b11
NOT stark (#565) 
* NOT operation stark

* Daniel PR comment
 2022-06-14 16:55:08 -07:00
Jacqueline Nabaglo
47efff834f
EVM decode (#553) 
* EVM decode

* Style and docs

* Daniel PR comments

* Minor style

* Work on tests

* Tests passing!

* Minor: fix comment

* William comments
 2022-06-03 19:24:47 -07:00
Daniel Lubarov
c54896dcb8
Rename starky2 -> evm (#547) 2022-05-18 10:32:14 -07:00