Nicholas Ward
0b9881c5e3
blocks in stack manipulation
2022-09-09 12:05:58 -07:00
Dmitry Vagner
9561dceb39
fix
2022-09-08 20:16:51 -07:00
Dmitry Vagner
3bfb994cbd
fix errors
2022-09-08 19:35:37 -07:00
Dmitry Vagner
7ed78c22a3
minor errors
2022-09-08 15:47:18 -07:00
Daniel Lubarov
fdb6cafe18
Fill in call_common routine
2022-09-07 16:42:21 -07:00
Daniel Lubarov
9b259cb917
Feedback
2022-09-05 10:12:23 -07:00
Daniel Lubarov
aaf7ace396
Remove JUMPDESTs
2022-09-04 22:31:56 -07:00
Daniel Lubarov
f2f291606b
Merge pull request #702 from mir-protocol/keccak_sponge_table_v2
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Keccak sponge STARK
2022-09-04 22:21:21 -07:00
Nicholas Ward
df15031145
clippy: remove unused 'peekable'
2022-09-02 15:40:24 -07:00
Daniel Lubarov
2c77247d43
Keccak sponge STARK
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It contains a row for each absorb step of the sponge.
2022-09-01 09:41:19 -07:00
Jacqueline Nabaglo
4c52d37546
Save columns by verifying invalid opcodes in software ( #701 )
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* Save columns by verifying invalid opcodes in software
* Autogenerate invalid opcode bitfield (Daniel comment)
* Remove unnecessary panic label
2022-08-30 13:06:03 -07:00
Daniel Lubarov
8505d64e37
Fill in keccakf_u32s
2022-08-30 12:28:08 -07:00
Jacqueline Nabaglo
013bf6471d
Transpose memory columns (make it an array of channel structs) ( #700 )
2022-08-26 22:05:16 -07:00
Jacqueline Nabaglo
f48de368a9
Make jumps, logic, and syscalls read from/write to memory columns ( #699 )
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* Make jumps, logic, and syscalls read from/write to memory columns
* Change CTL convention (outputs precede inputs)
* Change convention so outputs follow inputs in memory channel order
2022-08-26 14:39:39 -07:00
Daniel Lubarov
d0be79e822
Feedback
2022-08-25 23:35:38 -07:00
Daniel Lubarov
aa87f2c3ba
Public memory
2022-08-25 20:19:18 -07:00
Dmitry Vagner
e6e6099cec
finished hash loop
2022-08-25 16:18:45 -07:00
Daniel Lubarov
9671c1e535
Merge pull request #669 from mir-protocol/keccak_memory
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Keccak memory stark
2022-08-25 15:55:48 -07:00
Dmitry Vagner
3e671155cb
all but blocks
2022-08-25 15:38:18 -07:00
Jacqueline Nabaglo
f1a5b7b2d1
Delete opcode column ( #672 )
2022-08-25 11:56:25 -05:00
Daniel Lubarov
522cac5e15
Keccak memory stark
2022-08-24 09:29:17 -07:00
Dmitry Vagner
ca23001029
add constants
2022-08-23 16:40:31 -07:00
Daniel Lubarov
782d7d0e18
Revert "Support accessing local row in CTLs"
2022-08-23 12:22:54 -07:00
Dmitry Vagner
03b4d0a9da
all but memory
2022-08-23 12:03:06 -07:00
Daniel Lubarov
cc02371e92
Merge pull request #682 from mir-protocol/ctl_prev
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Support accessing local row in CTLs
2022-08-23 11:26:59 -07:00
Daniel Lubarov
ce456fb8ea
Merge pull request #665 from mir-protocol/trie_metadata
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Trie related segments and metadata
2022-08-22 17:30:28 -07:00
Daniel Lubarov
a37dec9881
Support accessing previous row in CTLs
2022-08-22 15:20:10 -07:00
Jacqueline Nabaglo
5922c58730
Change logic limb size to 32 bits ( #674 )
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* Change logic limb size to 32 bits
* Remove unnecessary columns (thx Daniel!)
2022-08-17 21:19:27 -07:00
Daniel Lubarov
bfe86d70f5
Start with PC=route_txn instead of 0
2022-08-17 12:21:29 -07:00
Dmitry Vagner
dc2d4b893b
Merge branch 'main' of github.com:mir-protocol/plonky2 into ripeMD
2022-08-16 15:22:40 -07:00
Jacqueline Nabaglo
b98dd47820
Permission levels, jumps, traps ( #653 )
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* Permission levels, jumps, traps
* Tests passing
* PR comments + documentation
* Docs + minor bugfixes
* Tests
* Use already-defined `stop` and `exception` (but renamed to `sys_stop`, `fault_exception`)
* Daniel comments
2022-08-16 09:46:10 -07:00
Daniel Lubarov
232303b9ec
Merge pull request #666 from mir-protocol/rlp_encode
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RLP encoding functions
2022-08-15 12:19:04 -07:00
Daniel Lubarov
97b271bf69
Merge pull request #663 from mir-protocol/use_mstore_txn_field
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Make use of `mstore_txn_field` in type 0 parsing
2022-08-15 11:41:18 -07:00
Daniel Lubarov
539152d767
RLP encoding functions
2022-08-14 11:41:53 -07:00
Daniel Lubarov
6a7e8d0fb0
Trie related segments and metadata
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Summary of the design:
- Tries are stored as immutable, copy-on-write trees
- All trie data is stored in the `TrieData` segment. Since it's immutable, data is never modified/deleted, new versions are just appended at the end.
- In order to support reverts, each context stores a pointer to the initial state trie version, plus the initial version of each storage trie.
One variation which may be worth considering is storing the whole state trie as one big trie (with sub-tries for storage). Reverts would then be simpler - we'd replace a single pointer. I thought that approach might make hashing the trie a bit more complex, as the node associated with an account would be a special type of node, rather than just another leaf. Either approach seems reasonable though.
2022-08-13 13:24:58 -07:00
Daniel Lubarov
f52e005307
Add static
2022-08-13 12:17:19 -07:00
Daniel Lubarov
6ea801d960
TODOs
2022-08-13 10:23:29 -07:00
Daniel Lubarov
74b1fd25e6
TODOs
2022-08-12 17:37:00 -07:00
Daniel Lubarov
cc61c7211c
Core transaction processing logic
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With lots of TODOs to fill in afterward; this is just a start.
2022-08-12 17:20:18 -07:00
Daniel Lubarov
1763b6bc37
Merge pull request #662 from mir-protocol/stack_pruning_opt_perms
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For permutations, find the optimal sequence of swaps
2022-08-12 17:19:47 -07:00
Daniel Lubarov
288ff63945
Fix shift ordering
2022-08-10 21:47:37 -07:00
Daniel Lubarov
707e564934
Make use of mstore_txn_field in type 0 parsing
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Some of the `%stack` operations are now trivial, but I kind of like keeping `%stack` since it serves as documentation as well, making comments about the stack unnecessary.
2022-08-09 18:44:41 -04:00
Dmitry Vagner
f9efc3aede
draft implementation
2022-08-09 15:11:18 -07:00
Dmitry Vagner
26574f8b1e
swap shift orders
2022-08-09 14:28:32 -07:00
Daniel Lubarov
763d63de08
For permutations, find the optimal sequence of swaps
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Using a method Angus described. This is mainly his idea and code, I just ported it to Rust.
2022-08-09 16:33:02 -04:00
Daniel Lubarov
68de3ee0c6
Merge pull request #660 from mir-protocol/packing
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Packing memory operations
2022-08-08 14:23:49 -04:00
Dmitry Vagner
48f17e484b
space
2022-08-08 11:04:05 -04:00
Dmitry Vagner
4633845452
fix merge conflict
2022-08-08 10:57:39 -04:00
Dmitry Vagner
ac4d7820e3
merge
2022-08-08 10:56:23 -04:00
Dmitry Vagner
93d25859b2
merge
2022-08-08 10:51:01 -04:00
