9 Commits

Author SHA1 Message Date
wborgeaud
a268677936 Merge branch 'main' into ecrecover_kernel
# Conflicts:
#	evm/src/cpu/kernel/aggregator.rs
2022-07-18 14:01:10 +02:00
Daniel Lubarov
0802d6c021 Continue work on bootstrapping
The kernel is hashed using a Keccak based sponge for now. We could switch to Poseidon later if our kernel grows too large.

Note that we use simple zero-padding (pad0*) instead of the standard pad10* rule. It's simpler, and we don't care that the prover can add extra 0s at the end of the code. The program counter can never reach those bytes, and even if it could, they'd be 0 anyway given the EVM's zero-initialization rule.

In one CPU row, we can do a whole Keccak hash (via the CTL), absorbing 136 bytes. But we can't actually bootstrap that many bytes of kernel code in one row, because we're also limited by memory bandwidth. Currently we can write 4 bytes of the kernel to memory in one row.

So we treat the `keccak_input_limbs` columns as a buffer. We gradually fill up this buffer, 4 bytes (one `u32` word) at a time. Every `136 / 4 = 34` rows, the buffer will be full, so at that point we activate the Keccak CTL to absorb the buffer.
2022-07-14 11:59:01 -07:00
wborgeaud
c8c3cc9a8f Files shuffling 2022-07-13 18:48:25 +02:00
Daniel Lubarov
8a2a035411 Merge branch 'main' into evm_generation 2022-07-11 09:58:38 -07:00
Daniel Lubarov
58889e7649
Allow constants to be passed from Rust into our assembly (#598)
Roughly like environment variables. So we don't have to declare things like segment IDs twice.
2022-07-08 08:56:46 -07:00
wborgeaud
3ec2d307e5 EVM interpreter 2022-07-07 16:53:06 +02:00
Daniel Lubarov
e7b480deaf Begin work on witness generation and kernel bootstrapping 2022-07-01 10:09:57 -07:00
Jacqueline Nabaglo
e3834a5335
Util for assembling EVM code to hex (#586)
This is just for debugging the kernel. It's fully disposable.
2022-06-27 18:08:03 -07:00
Daniel Lubarov
2e818172f0
Parse and assemble kernel functions (#567)
* Parse and assemble kernel functions

Written in "EVM++" assembly. Later on we will add some priviledged opcodes (in unused opcode ordinals), making it an extension of EVM bytecode.

I don't think there's much of a standard for EVM assembly, but I loosely based the syntax on this [proposal](https://gist.github.com/axic/17ddbbce4738ccf4040d30cbb5de484e).

* PR feedback

* tweaks for consistency

* terminology tweaks

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>
2022-06-20 20:32:29 -07:00