Daniel Lubarov
d091910d79
fmt
2022-12-03 11:22:56 -08:00
Daniel Lubarov
b8b2fefe52
Use Keccak sponge table for bootloading
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And get rid of the deprecated Keccak memory table.
2022-12-03 11:21:31 -08:00
Daniel Lubarov
a63b73a851
Misc fixes
2022-12-02 13:56:52 -08:00
Daniel Lubarov
4f66d58de5
Fixes
2022-12-01 17:14:40 -08:00
Daniel Lubarov
05ab3d7933
Fixes
2022-12-01 16:23:39 -08:00
wborgeaud
4ff6bbb3de
Hardcode verifier data in the circuit
2022-10-07 09:47:03 +02:00
wborgeaud
39fc219324
PR feedback
2022-10-06 16:40:03 +02:00
wborgeaud
0bc3f20479
PR feedback
2022-10-06 16:32:35 +02:00
wborgeaud
e515f1e1cc
Split circuit and witness generation
2022-10-04 09:56:12 +02:00
wborgeaud
a5a4098d7a
Merge branch 'main' into per_table_recursion
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# Conflicts:
# evm/src/all_stark.rs
# evm/src/generation/mod.rs
# evm/src/recursive_verifier.rs
2022-10-03 11:49:26 +02:00
wborgeaud
668957176a
PR feedback
2022-10-03 11:44:52 +02:00
Daniel Lubarov
c721155e23
Main function, txn processing loop
2022-09-29 23:15:33 -07:00
wborgeaud
6cf6b56aa0
Method to compute verifier data without proving
2022-09-26 15:47:35 +02:00
Daniel Lubarov
b6d71a7008
Keccak benchmark
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And reworking things a bit to include the timing data we want.
2022-09-23 10:54:17 -07:00
wborgeaud
0053a02119
Cleaning
2022-09-23 16:28:20 +02:00
wborgeaud
502305146f
Working
2022-09-23 16:25:02 +02:00
wborgeaud
e712986a92
Challenger state works
2022-09-23 13:41:14 +02:00
Jacqueline Nabaglo
084700a7f4
Memory channel for program counter ( #717 )
2022-09-22 18:09:23 -07:00
wborgeaud
e6708da36f
Comments
2022-09-05 16:34:29 +02:00
wborgeaud
35b22974ed
Recursively verify
2022-09-05 12:25:30 +02:00
wborgeaud
e6490fdd11
Add verify
2022-09-05 09:17:00 +02:00
wborgeaud
c320a9e8ae
Merge branch 'main' into per_table_recursion
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# Conflicts:
# evm/src/all_stark.rs
# evm/src/proof.rs
2022-09-05 08:34:52 +02:00
Jacqueline Nabaglo
013bf6471d
Transpose memory columns (make it an array of channel structs) ( #700 )
2022-08-26 22:05:16 -07:00
Jacqueline Nabaglo
f48de368a9
Make jumps, logic, and syscalls read from/write to memory columns ( #699 )
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* Make jumps, logic, and syscalls read from/write to memory columns
* Change CTL convention (outputs precede inputs)
* Change convention so outputs follow inputs in memory channel order
2022-08-26 14:39:39 -07:00
wborgeaud
05c3c4d907
First pass
2022-08-26 10:12:45 +02:00
wborgeaud
2fa347128f
All recursive proofs
2022-08-26 09:49:59 +02:00
wborgeaud
8600a5a46f
Merge branch 'main' into per_table_recursion
...
# Conflicts:
# evm/src/proof.rs
2022-08-26 09:41:00 +02:00
Daniel Lubarov
b829b44dcf
Fix test
2022-08-25 22:11:25 -07:00
Daniel Lubarov
9671c1e535
Merge pull request #669 from mir-protocol/keccak_memory
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Keccak memory stark
2022-08-25 15:55:48 -07:00
Daniel Lubarov
30cc318cde
Feedback
2022-08-25 14:45:56 -07:00
wborgeaud
9e9ff9872b
Per table recursion
2022-08-25 22:04:28 +02:00
Jacqueline Nabaglo
f1a5b7b2d1
Delete opcode column ( #672 )
2022-08-25 11:56:25 -05:00
Daniel Lubarov
095140fda5
Use KECCAK_WIDTH_BYTES
2022-08-24 20:10:58 -07:00
Daniel Lubarov
c140555f2b
Fix
2022-08-24 11:53:27 -07:00
Daniel Lubarov
522cac5e15
Keccak memory stark
2022-08-24 09:29:17 -07:00
Daniel Lubarov
c38a98f9e4
Simpler CPU <-> memory CTL
2022-08-23 23:38:28 -07:00
Daniel Lubarov
782d7d0e18
Revert "Support accessing local row in CTLs"
2022-08-23 12:22:54 -07:00
Daniel Lubarov
a37dec9881
Support accessing previous row in CTLs
2022-08-22 15:20:10 -07:00
Daniel Lubarov
bfe86d70f5
Start with PC=route_txn instead of 0
2022-08-17 12:21:29 -07:00
Jacqueline Nabaglo
b98dd47820
Permission levels, jumps, traps ( #653 )
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* Permission levels, jumps, traps
* Tests passing
* PR comments + documentation
* Docs + minor bugfixes
* Tests
* Use already-defined `stop` and `exception` (but renamed to `sys_stop`, `fault_exception`)
* Daniel comments
2022-08-16 09:46:10 -07:00
Jacqueline Nabaglo
16c2bee4b9
Increment program counter on native instructions ( #641 )
2022-07-28 17:30:20 -07:00
Daniel Lubarov
b2f09881c0
Merge branch 'main' into cpu_shared_cols
2022-07-28 13:41:46 -07:00
Jacqueline Nabaglo
c160c4032d
Inter-row program counter constraints ( #639 )
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* Beginning of control flow support
* Fixes to halt spin loop
2022-07-27 11:36:33 -07:00
Daniel Lubarov
3d83d63f0b
Shared CPU columns
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I was thinking we could have two sets of shared columns:
- First, a set of "core" columns which would contain instruction decoding registers during an execution cycle, or some counter data during a kernel bootloading cycle.
- Second, a set of "general" columns which would be more general-purpose. For now it could contain "looking" columns for most CTLs (Keccak, arithmetic and logic; NOT memory since memory can be used simultaneously with the others). It could potentially be reused for other things too, such as the registers used for `EQ` and `IS_ZERO` (but I know it's nontrivial to share those since we would need to use lower-degree constraints, so I wouldn't bother for now).
This PR implements just the latter. If it looks good I'll proceed with the former afterward.
2022-07-18 12:15:41 -07:00
Daniel Lubarov
ab5abc391d
Organize segments in an enum
...
It's a bit more type-safe (can't mix up segment with context or virtual addr), and this way uniqueness of ordinals is enforced, partially addressing a concern raised in #591 .
To avoid making `Segment` public (which I don't think would be appropriate), I had to make some other visibility changes, and had to move `generate_random_memory_ops` into the test module.
2022-07-16 10:16:12 -07:00
Daniel Lubarov
10c31b7036
feedback
2022-07-12 14:33:10 -07:00
Daniel Lubarov
a3deefd891
fix
2022-07-11 17:37:17 -07:00
Daniel Lubarov
ef3addea2c
Merge branch 'main' into evm_generation
2022-07-11 17:24:37 -07:00
wborgeaud
61f98f3695
Merge pull request #602 from mir-protocol/better_ctl_error
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Better CTL errors
2022-07-11 20:07:28 +02:00
Nicholas Ward
467f532024
addressed comments
2022-07-11 10:44:48 -07:00
