2513 Commits

Author SHA1 Message Date
Daniel Lubarov
2b9600e50c Misc 2022-07-31 13:22:17 -07:00
Daniel Lubarov
a34a4c8184 fix 2022-07-31 13:03:07 -07:00
Daniel Lubarov
497b26dee6 Some simple optimization rules
Depends on #647.
2022-07-31 13:00:27 -07:00
Daniel Lubarov
7e91720088 Store literals as U256 (or u8 for BYTES)
Instead of the original strings. Will make optimizations simpler.
2022-07-31 12:12:35 -07:00
Daniel Lubarov
bd6847e8fc Allow %stack to work with labels
There's no syntax to distinguish named stack items from labels, so this simply searches the former first. I.e. labels can be shadowed by stack items.
2022-07-31 12:12:17 -07:00
Daniel Lubarov
7a6d996fe7 Move couple asm files 2022-07-31 09:28:16 -07:00
Daniel Lubarov
d91e1bf3d7
Merge pull request #645 from mir-protocol/curve_dir
Add a `asm/curve/` directory
2022-07-31 09:24:42 -07:00
Daniel Lubarov
718b3c0961 Move ecrecover 2022-07-31 09:24:04 -07:00
Daniel Lubarov
56d814e467 fix 2022-07-31 09:22:13 -07:00
Daniel Lubarov
f49170a8b8 fix 2022-07-30 22:31:07 -07:00
Daniel Lubarov
86a797b1db Add a asm/curve/ directory 2022-07-30 22:24:11 -07:00
wborgeaud
d2141581de
Merge pull request #643 from mir-protocol/interpreter_remove_stack_code
Remove stack and code in interpreter
2022-07-30 14:44:17 +02:00
Jacqueline Nabaglo
24bb632358
Implement PANIC instruction (#644)
* Implement PANIC instruction

* Minor: comments
2022-07-29 12:04:42 -07:00
Daniel Lubarov
760a111a63
Merge pull request #642 from mir-protocol/type_0_fix
Small fix for type 0 txns
2022-07-29 09:28:20 -07:00
wborgeaud
209dc26dc9 Remove stack and code in interpreter 2022-07-29 14:29:10 +02:00
wborgeaud
2bae8f92f0
Merge pull request #635 from mir-protocol/nondeterministic_ec_ops
Use non-determinism in EC ops
2022-07-29 13:05:12 +02:00
wborgeaud
eb96216278 Typo 2022-07-29 11:32:55 +02:00
Jacqueline Nabaglo
16c2bee4b9
Increment program counter on native instructions (#641) 2022-07-28 17:30:20 -07:00
Daniel Lubarov
563de9e1c5 Small fix for type 0 txns
Always parse "to" as a scalar. No need for a branch; it's left over from when I was trying to enforce canonical RLP (in which case "to" must be 0 or 20 bytes).

The old code would be wrong if we had multiple txns per proof, as if to=0 we wouldn't write that field to memory, so it could have an old value from a previous txn.
2022-07-28 15:51:33 -07:00
Daniel Lubarov
55d0eddecb profiling 2022-07-28 14:46:56 -07:00
Daniel Lubarov
431bb5e66e
Merge pull request #621 from mir-protocol/cpu_shared_cols
Shared CPU columns
2022-07-28 14:10:34 -07:00
Daniel Lubarov
cc9e9fe753 Merge branch 'main' into cpu_shared_cols 2022-07-28 13:42:12 -07:00
Daniel Lubarov
b2f09881c0 Merge branch 'main' into cpu_shared_cols 2022-07-28 13:41:46 -07:00
Daniel Lubarov
bb45c8c850
Merge pull request #629 from proxima-one/maybe-rayon
add rayon shim
2022-07-28 11:38:56 -07:00
wborgeaud
87640d7e98 PR feedback 2022-07-28 10:35:53 +02:00
Sebastien La Duca
8ad0924bbb apparently i need to update rust 2022-07-28 00:24:54 -04:00
Sebastien La Duca
fd0af3fa3e allow unused mut when feature disabled 2022-07-28 00:21:21 -04:00
Sebastien La Duca
9f2fa07e12 add rest of files 2022-07-28 00:09:11 -04:00
Sebastien La Duca
b7fa5e81c4 add timing to starky, evm, and system_zero 2022-07-28 00:08:51 -04:00
Sebastien La Duca
85111b0f02 fix missing underscore 2022-07-27 23:58:16 -04:00
Sebastien La Duca
a6931d4555 fmt 2022-07-27 23:53:33 -04:00
Sebastien La Duca
585495d314 feature-gate stub TimingTree 2022-07-27 23:53:26 -04:00
Sebastien La Duca
16ddfcb94c make env_logger dev-dependency 2022-07-27 23:35:15 -04:00
Jacqueline Nabaglo
c160c4032d
Inter-row program counter constraints (#639)
* Beginning of control flow support

* Fixes to halt spin loop
2022-07-27 11:36:33 -07:00
wborgeaud
bb2ee9d543 Implement sqrt 2022-07-27 17:06:16 +02:00
wborgeaud
8053215841 Inverse for other fields 2022-07-27 16:49:26 +02:00
Daniel Lubarov
c028afa1f8 Update paper 2022-07-27 07:37:38 -07:00
wborgeaud
ce23d4377a Minor 2022-07-27 11:27:04 +02:00
wborgeaud
bb773e42b3 Merge branch 'main' into nondeterministic_ec_ops
# Conflicts:
#	evm/src/cpu/kernel/interpreter.rs
2022-07-27 11:24:22 +02:00
wborgeaud
670bed946a
Merge pull request #638 from mir-protocol/interpreter_context_segments
Contexts and segments in interpreter memory
2022-07-27 10:34:41 +02:00
wborgeaud
ac68ce62c2 Merge conflicts 2022-07-27 10:16:04 +02:00
wborgeaud
fbfe0ad62a Merge branch 'main' into interpreter_context_segments 2022-07-27 10:12:59 +02:00
wborgeaud
e8ab92b115 PR feedback 2022-07-27 10:05:31 +02:00
Daniel Lubarov
a1635514b5
Merge pull request #627 from mir-protocol/rlp_3
Transaction (RLP) parsing
2022-07-26 16:25:30 -07:00
Daniel Lubarov
3d8ac2a391 style 2022-07-26 16:25:01 -07:00
Daniel Lubarov
d1cb854cf2 terminology 2022-07-26 16:12:21 -07:00
Daniel Lubarov
6df1a669e1
Merge pull request #636 from mir-protocol/challenger_fixed_buffer
Use a fixed input buffer size in `Challenger`.
2022-07-26 16:09:19 -07:00
Daniel Lubarov
0ba6078984 Merge branch 'main' into rlp_3 2022-07-25 19:47:43 -07:00
Daniel Lubarov
05c7dfa115 Feedback 2022-07-25 16:32:59 -07:00
wborgeaud
a0295f0079 Minor 2022-07-25 11:09:41 +02:00