84 Commits

Author SHA1 Message Date
Daniel Lubarov
c38a98f9e4 Simpler CPU <-> memory CTL 2022-08-23 23:38:28 -07:00
Daniel Lubarov
782d7d0e18
Revert "Support accessing local row in CTLs" 2022-08-23 12:22:54 -07:00
Daniel Lubarov
a37dec9881 Support accessing previous row in CTLs 2022-08-22 15:20:10 -07:00
Daniel Lubarov
bfe86d70f5 Start with PC=route_txn instead of 0 2022-08-17 12:21:29 -07:00
Jacqueline Nabaglo
b98dd47820
Permission levels, jumps, traps (#653)
* Permission levels, jumps, traps

* Tests passing

* PR comments + documentation

* Docs + minor bugfixes

* Tests

* Use already-defined `stop` and `exception` (but renamed to `sys_stop`, `fault_exception`)

* Daniel comments
2022-08-16 09:46:10 -07:00
Jacqueline Nabaglo
16c2bee4b9
Increment program counter on native instructions (#641) 2022-07-28 17:30:20 -07:00
Daniel Lubarov
b2f09881c0 Merge branch 'main' into cpu_shared_cols 2022-07-28 13:41:46 -07:00
Jacqueline Nabaglo
c160c4032d
Inter-row program counter constraints (#639)
* Beginning of control flow support

* Fixes to halt spin loop
2022-07-27 11:36:33 -07:00
Daniel Lubarov
3d83d63f0b Shared CPU columns
I was thinking we could have two sets of shared columns:
- First, a set of "core" columns which would contain instruction decoding registers during an execution cycle, or some counter data during a kernel bootloading cycle.
- Second, a set of "general" columns which would be more general-purpose. For now it could contain "looking" columns for most CTLs (Keccak, arithmetic and logic; NOT memory since memory can be used simultaneously with the others). It could potentially be reused for other things too, such as the registers used for `EQ` and `IS_ZERO` (but I know it's nontrivial to share those since we would need to use lower-degree constraints, so I wouldn't bother for now).

This PR implements just the latter. If it looks good I'll proceed with the former afterward.
2022-07-18 12:15:41 -07:00
Daniel Lubarov
ab5abc391d Organize segments in an enum
It's a bit more type-safe (can't mix up segment with context or virtual addr), and this way uniqueness of ordinals is enforced, partially addressing a concern raised in #591.

To avoid making `Segment` public (which I don't think would be appropriate), I had to make some other visibility changes, and had to move `generate_random_memory_ops` into the test module.
2022-07-16 10:16:12 -07:00
Daniel Lubarov
10c31b7036 feedback 2022-07-12 14:33:10 -07:00
Daniel Lubarov
a3deefd891 fix 2022-07-11 17:37:17 -07:00
Daniel Lubarov
ef3addea2c Merge branch 'main' into evm_generation 2022-07-11 17:24:37 -07:00
wborgeaud
61f98f3695
Merge pull request #602 from mir-protocol/better_ctl_error
Better CTL errors
2022-07-11 20:07:28 +02:00
Nicholas Ward
467f532024 addressed comments 2022-07-11 10:44:48 -07:00
Nicholas Ward
888cfe4ca4 fix 2022-07-11 10:44:48 -07:00
Nicholas Ward
afc5a4dc4f fixes 2022-07-11 10:44:48 -07:00
Nicholas Ward
51498eb748 fmt 2022-07-11 10:44:48 -07:00
Nicholas Ward
f3ef6c9bf3 fix: ignore padding rows in constraints 2022-07-11 10:44:48 -07:00
Nicholas Ward
83963c3a8f permutation pairs 2022-07-11 10:44:48 -07:00
Nicholas Ward
b467a13d91 fix 2022-07-11 10:44:48 -07:00
Nicholas Ward
c3e7652763 updates 2022-07-11 10:44:48 -07:00
Nicholas Ward
181a132335 fixes 2022-07-11 10:44:48 -07:00
Nicholas Ward
a98f267ff0 initial change 2022-07-11 10:44:48 -07:00
wborgeaud
91fcf26289 Better CTL error 2022-07-11 11:07:16 +02:00
Daniel Lubarov
5d74a19ad6 Add test (won't work for a while, but to illustrate) 2022-07-04 18:10:03 -07:00
Daniel Lubarov
28603b85d1 fixes 2022-07-01 10:09:57 -07:00
Daniel Lubarov
e7b480deaf Begin work on witness generation and kernel bootstrapping 2022-07-01 10:09:57 -07:00
Jacqueline Nabaglo
bc9e618967
Structured wrapper over CPU table row (#589)
* Structured wrapper over CPU table row

* Lints

* minor style

* Minor cleanup
2022-06-29 16:23:44 -07:00
wborgeaud
7812ad242c s/registers/columns 2022-06-29 10:02:03 +02:00
wborgeaud
b228cc72fe s/columns/registers 2022-06-28 02:28:25 +02:00
Daniel Lubarov
34e73db42b
Memory naming tweaks (#579)
* Memory naming tweaks

- Define the channel count and value limbs in a single place, so they're easy to adjust.
- Standardize on "channels" which I think is more explicit, since e.g. `num_mem_ops` used to mean either the channel count or total operation count in a trace.

* feedback

* tweaks

* fmt
2022-06-27 16:03:56 -07:00
Daniel Lubarov
3346d3f902
field_types -> types (#583)
* `field_types` -> `types`

Here too, I think "field" is usually clear from context, e.g. in `use plonky2::field::types::Field;`.

* fixes

* fmt
2022-06-27 12:24:09 -07:00
Daniel Lubarov
475964a6bb
Move CTL config out of test (#578)
* Move CTL config out of test

Since the same config will be used in other tests (and maybe external callers, unless we add an API later to abstract it).

* fmt

* Split up CTLs
2022-06-27 10:40:16 -07:00
Daniel Lubarov
410e03349c
extension_field -> extension (#581)
It seems redundant in most contexts, e.g. `use plonky2::field::extension_field::Extendable;`. One could import `extension_field`, but it's not that common in Rust, and `field::extension` is now about as short.
2022-06-27 07:18:21 -07:00
Jacqueline Nabaglo
912281de9b
CTL: limbs (CPU) <-> bits (logic) (#577)
* CTL: limbs (CPU) <-> bits (logic)

* Minor: stray TODO mark

* Document Zero op

* Util for constructing an int from bits
2022-06-25 13:34:04 -07:00
Nicholas Ward
4a7ebf057b updated in line with main changes 2022-06-23 14:36:14 -07:00
Nicholas Ward
791b15f94f cleanup 2022-06-23 14:01:22 -07:00
Nicholas Ward
4d69998cde fix and cleanup 2022-06-23 14:01:22 -07:00
Nicholas Ward
d911eecd37 fixes 2022-06-23 14:01:22 -07:00
Nicholas Ward
29fa32465c fixes 2022-06-23 14:01:22 -07:00
Nicholas Ward
d6983951a4 attempted fix 2022-06-23 14:01:22 -07:00
Nicholas Ward
f16db8c564 fmt 2022-06-23 14:01:22 -07:00
Nicholas Ward
593d3eeffd fixes 2022-06-23 14:01:22 -07:00
Nicholas Ward
9434819829 addressed comments 2022-06-23 14:01:22 -07:00
Nicholas Ward
2d7f2b47c2 fmt 2022-06-23 14:01:22 -07:00
Nicholas Ward
a2c14077d2 fixes 2022-06-23 14:01:22 -07:00
Nicholas Ward
08be9811cd timestamp fixes 2022-06-23 14:01:18 -07:00
Nicholas Ward
5707732b75 fix 2022-06-23 14:00:48 -07:00
Nicholas Ward
bf58c20329 updates to registers, new cross-table lookups 2022-06-23 14:00:48 -07:00