6 Commits

Author SHA1 Message Date
Jacqueline Nabaglo
c160c4032d
Inter-row program counter constraints (#639)
* Beginning of control flow support

* Fixes to halt spin loop
2022-07-27 11:36:33 -07:00
Daniel Lubarov
e7b480deaf Begin work on witness generation and kernel bootstrapping 2022-07-01 10:09:57 -07:00
Daniel Lubarov
2e818172f0
Parse and assemble kernel functions (#567)
* Parse and assemble kernel functions

Written in "EVM++" assembly. Later on we will add some priviledged opcodes (in unused opcode ordinals), making it an extension of EVM bytecode.

I don't think there's much of a standard for EVM assembly, but I loosely based the syntax on this [proposal](https://gist.github.com/axic/17ddbbce4738ccf4040d30cbb5de484e).

* PR feedback

* tweaks for consistency

* terminology tweaks

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

* Update evm/src/cpu/kernel/opcodes.rs

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>

Co-authored-by: Jacqueline Nabaglo <jakub@mirprotocol.org>
2022-06-20 20:32:29 -07:00
Jacqueline Nabaglo
49219a2b11
NOT stark (#565)
* NOT operation stark

* Daniel PR comment
2022-06-14 16:55:08 -07:00
Jacqueline Nabaglo
47efff834f
EVM decode (#553)
* EVM decode

* Style and docs

* Daniel PR comments

* Minor style

* Work on tests

* Tests passing!

* Minor: fix comment

* William comments
2022-06-03 19:24:47 -07:00
Daniel Lubarov
c54896dcb8
Rename starky2 -> evm (#547) 2022-05-18 10:32:14 -07:00