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updates

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This commit is contained in:
Nicholas Ward 2021-10-07 09:25:57 -07:00
parent 8440a0f5cb
commit ebcfde1d81
2 changed files with 14 additions and 34 deletions
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42
src/gadgets/arithmetic_u32.rs
View File

@ -1,15 +1,10 @@
use std::collections::BTreeMap;
use std::marker::PhantomData; use std::marker::PhantomData;
use crate::field::field_types::RichField; use crate::field::field_types::RichField;
use crate::field::{extension_field::Extendable, field_types::Field}; use crate::field::extension_field::Extendable;
use crate::gates::arithmetic_u32::{U32ArithmeticGate, NUM_U32_ARITHMETIC_OPS}; use crate::gates::arithmetic_u32::{U32ArithmeticGate, NUM_U32_ARITHMETIC_OPS};
use crate::gates::switch::SwitchGate;
use crate::iop::generator::{GeneratedValues, SimpleGenerator};
use crate::iop::target::Target; use crate::iop::target::Target;
use crate::iop::witness::{PartitionWitness, Witness};
use crate::plonk::circuit_builder::CircuitBuilder; use crate::plonk::circuit_builder::CircuitBuilder;
use crate::util::bimap::bimap_from_lists;
pub struct U32Target(Target); pub struct U32Target(Target);
@ -20,8 +15,7 @@ impl<F: RichField + Extendable<D>, const D: usize> CircuitBuilder<F, D> {
pub fn add_virtual_u32_targets(&self, n: usize) -> Vec<U32Target> { pub fn add_virtual_u32_targets(&self, n: usize) -> Vec<U32Target> {
self.add_virtual_targets(n) self.add_virtual_targets(n)
.iter() .into_iter()
.cloned()
.map(U32Target) .map(U32Target)
.collect() .collect()
} }
@ -52,9 +46,6 @@ impl<F: RichField + Extendable<D>, const D: usize> CircuitBuilder<F, D> {
Some((gate_index, copy)) => (gate_index, copy), Some((gate_index, copy)) => (gate_index, copy),
}; };
let output_low = self.add_virtual_u32_target();
let output_high = self.add_virtual_u32_target();
self.connect( self.connect(
Target::wire( Target::wire(
gate_index, gate_index,
@ -73,27 +64,18 @@ impl<F: RichField + Extendable<D>, const D: usize> CircuitBuilder<F, D> {
Target::wire(gate_index, U32ArithmeticGate::<F, D>::wire_ith_addend(copy)), Target::wire(gate_index, U32ArithmeticGate::<F, D>::wire_ith_addend(copy)),
z.0, z.0,
); );
self.connect(
Target::wire( let output_low = U32Target(Target::wire(
gate_index, gate_index,
U32ArithmeticGate::<F, D>::wire_ith_output_low_half(copy), U32ArithmeticGate::<F, D>::wire_ith_output_low_half(copy),
), ));
output_low.0, let output_high = U32Target(Target::wire(
); gate_index,
self.connect( U32ArithmeticGate::<F, D>::wire_ith_output_high_half(copy),
Target::wire( ));
gate_index,
U32ArithmeticGate::<F, D>::wire_ith_output_high_half(copy),
),
output_high.0,
);
if copy == NUM_U32_ARITHMETIC_OPS - 1 { if copy == NUM_U32_ARITHMETIC_OPS - 1 {
let gate = U32ArithmeticGate { self.current_u32_arithmetic_gate = None;
_phantom: PhantomData,
};
let gate_index = self.add_gate(gate, vec![]);
self.current_u32_arithmetic_gate = Some((gate_index, 0));
} else { } else {
self.current_u32_arithmetic_gate = Some((gate_index, copy + 1)); self.current_u32_arithmetic_gate = Some((gate_index, copy + 1));
} }

6
src/gates/arithmetic_u32.rs
View File

@ -309,8 +309,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F>
.take(num_limbs) .take(num_limbs)
.collect(); .collect();
let output_limbs_f: Vec<_> = output_limbs_u64 let output_limbs_f: Vec<_> = output_limbs_u64
.iter() .into_iter()
.cloned()
.map(F::from_canonical_u64) .map(F::from_canonical_u64)
.collect(); .collect();
@ -385,8 +384,7 @@ mod tests {
output /= limb_base; output /= limb_base;
} }
let mut output_limbs_f: Vec<_> = output_limbs let mut output_limbs_f: Vec<_> = output_limbs
.iter() .into_iter()
.cloned()
.map(F::from_canonical_u64) .map(F::from_canonical_u64)
.collect(); .collect();