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More routed wires for recursion (#104)

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* More routed wires for recursion

For the insertion gate, which (with a FRI arity of 4) uses 1 wire for the insertion index, D for the elemnet to insert, 3D for the original list, and 4D for the output list.

* import
This commit is contained in:
Daniel Lubarov 2021-07-19 08:52:10 -07:00 committed by GitHub
parent 4dc6a603a1
commit a9e5f1e4e2
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 2 additions and 3 deletions
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2
src/bin/bench_recursion.rs
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@ -22,7 +22,7 @@ fn main() -> Result<()> {
fn bench_prove<F: Field + Extendable<D>, const D: usize>() -> Result<()> {
let config = CircuitConfig {
num_wires: 134,
num_routed_wires: 27,
num_routed_wires: 33,
security_bits: 128,
rate_bits: 3,
num_challenges: 3,

1
src/gates/insertion.rs
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@ -3,7 +3,6 @@ use std::marker::PhantomData;
use std::ops::Range;
use crate::circuit_builder::CircuitBuilder;
use crate::field::extension_field::algebra::ExtensionAlgebra;
use crate::field::extension_field::target::ExtensionTarget;
use crate::field::extension_field::{Extendable, FieldExtension};
use crate::field::field::Field;

2
src/recursive_verifier.rs
View File

@ -322,7 +322,7 @@ mod tests {
const D: usize = 4;
let config = CircuitConfig {
num_wires: 134,
num_routed_wires: 28,
num_routed_wires: 33,
security_bits: 128,
rate_bits: 3,
num_challenges: 3,