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Fix merge issues

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This commit is contained in:
wborgeaud 2021-07-23 08:21:55 +02:00
parent 9a1c289f8e
commit a70e97befc
2 changed files with 2 additions and 7 deletions
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2
src/gadgets/arithmetic.rs
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@ -196,7 +196,7 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
let one = self.one();
let mut product = one;
for &bit in exponent_bits {
for bit in exponent_bits {
let multiplicand = self.select(*bit.borrow(), one, current);
product = self.mul(product, multiplicand);
current = self.mul(current, current);

7
src/gates/gmimc.rs
View File

@ -119,11 +119,6 @@ impl<F: Extendable<D>, const D: usize, const R: usize> Gate<F, D> for GMiMCGate<
let swap = vars.local_wires[Self::WIRE_SWAP];
constraints.push(swap * (swap - F::ONE));
let old_index_acc = vars.local_wires[Self::WIRE_INDEX_ACCUMULATOR_OLD];
let new_index_acc = vars.local_wires[Self::WIRE_INDEX_ACCUMULATOR_NEW];
let computed_new_index_acc = F::TWO * old_index_acc + swap;
constraints.push(computed_new_index_acc - new_index_acc);
let mut state = Vec::with_capacity(12);
for i in 0..4 {
let a = vars.local_wires[i];
@ -240,7 +235,7 @@ impl<F: Extendable<D>, const D: usize, const R: usize> Gate<F, D> for GMiMCGate<
}
fn num_constraints(&self) -> usize {
R + W + 2
R + W + 1
}
}