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Replace bits() fn with BITS const
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aed4de0293
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@ -59,6 +59,7 @@ pub trait Field:
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/// Generator of a multiplicative subgroup of order `2^TWO_ADICITY`.
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/// Generator of a multiplicative subgroup of order `2^TWO_ADICITY`.
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const POWER_OF_TWO_GENERATOR: Self;
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const POWER_OF_TWO_GENERATOR: Self;
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/// The bit length of the field order.
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const BITS: usize;
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const BITS: usize;
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fn order() -> BigUint;
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fn order() -> BigUint;
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@ -407,11 +408,6 @@ pub trait Field:
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pub trait PrimeField: Field<PrimeField = Self> {
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pub trait PrimeField: Field<PrimeField = Self> {
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const ORDER: u64;
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const ORDER: u64;
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/// The number of bits required to encode any field element.
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fn bits() -> usize {
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bits_u64(Self::NEG_ONE.to_canonical_u64())
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}
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fn to_canonical_u64(&self) -> u64;
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fn to_canonical_u64(&self) -> u64;
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fn to_noncanonical_u64(&self) -> u64;
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fn to_noncanonical_u64(&self) -> u64;
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@ -338,7 +338,7 @@ impl<F: RichField + Extendable<D>, const D: usize> CircuitBuilder<F, D> {
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// verify that this has a negligible impact on soundness error.
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// verify that this has a negligible impact on soundness error.
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Self::assert_noncanonical_indices_ok(&common_data.config);
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Self::assert_noncanonical_indices_ok(&common_data.config);
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let x_index = challenger.get_challenge(self);
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let x_index = challenger.get_challenge(self);
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let mut x_index_bits = self.low_bits(x_index, n_log, F::bits());
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let mut x_index_bits = self.low_bits(x_index, n_log, F::BITS);
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let cap_index =
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let cap_index =
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self.le_sum(x_index_bits[x_index_bits.len() - common_data.config.cap_height..].iter());
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self.le_sum(x_index_bits[x_index_bits.len() - common_data.config.cap_height..].iter());
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@ -24,7 +24,7 @@ impl<const B: usize> BaseSumGate<B> {
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}
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}
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pub fn new_from_config<F: PrimeField>(config: &CircuitConfig) -> Self {
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pub fn new_from_config<F: PrimeField>(config: &CircuitConfig) -> Self {
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let num_limbs = F::bits().min(config.num_routed_wires - Self::START_LIMBS);
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let num_limbs = F::BITS.min(config.num_routed_wires - Self::START_LIMBS);
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Self::new(num_limbs)
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Self::new(num_limbs)
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}
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}
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