mirror of
https://github.com/logos-storage/plonky2.git
synced 2026-01-10 01:33:07 +00:00
some tests
This commit is contained in:
Nicholas Ward
parent
542bc6283c
commit
8731f8136f
@ -66,12 +66,12 @@ impl<F: RichField + Extendable<D>, const D: usize> ComparisonGate<F, D> {
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}
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pub fn wire_z_val(&self, copy: usize) -> usize {
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copy * self.wires_per_copy() + 3
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copy * self.wires_per_copy() + 2
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}
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pub fn wire_z_bit(&self, copy: usize, bit_index: usize) -> usize {
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debug_assert!(bit_index < self.chunk_bits() + 1);
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copy * self.wires_per_copy() + 4 + bit_index
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copy * self.wires_per_copy() + 3 + bit_index
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}
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pub fn wire_first_chunk_val(&self, copy: usize, chunk: usize) -> usize {
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@ -377,105 +377,47 @@ mod tests {
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assert_eq!(gate.wire_second_input(0), 1);
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assert_eq!(gate.wire_z_val(0), 2);
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assert_eq!(gate.wire_z_bit(0, 0), 3);
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assert_eq!(gate.wire_z_bit(0, 3), 6);
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assert_eq!(gate.wire_first_chunk_val(0, 0), 7);
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assert_eq!(gate.wire_first_chunk_val(0, 0), 7);
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assert_eq!(gate.wire_first_input(0, 0), 0);
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assert_eq!(gate.wire_first_input(0, 2), 2);
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assert_eq!(gate.wire_second_input(0, 0), 3);
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assert_eq!(gate.wire_second_input(0, 2), 5);
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assert_eq!(gate.wire_first_output(0, 0), 6);
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assert_eq!(gate.wire_second_output(0, 2), 11);
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assert_eq!(gate.wire_switch_bool(0), 12);
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assert_eq!(gate.wire_first_input(1, 0), 13);
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assert_eq!(gate.wire_second_output(1, 2), 24);
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assert_eq!(gate.wire_switch_bool(1), 25);
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assert_eq!(gate.wire_first_input(2, 0), 26);
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assert_eq!(gate.wire_second_output(2, 2), 37);
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assert_eq!(gate.wire_switch_bool(2), 38);
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assert_eq!(gate.wire_z_bit(0, 8), 11);
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assert_eq!(gate.wire_first_chunk_val(0, 0), 12);
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assert_eq!(gate.wire_first_chunk_val(0, 4), 16);
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assert_eq!(gate.wire_second_chunk_val(0, 0), 17);
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assert_eq!(gate.wire_second_chunk_val(0, 4), 21);
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assert_eq!(gate.wire_equality_dummy(0, 0), 22);
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assert_eq!(gate.wire_equality_dummy(0, 4), 26);
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assert_eq!(gate.wire_chunks_equal(0, 0), 27);
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assert_eq!(gate.wire_chunks_equal(0, 4), 31);
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assert_eq!(gate.wire_first_input(1), 32);
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assert_eq!(gate.wire_chunks_equal(1, 4), 63);
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assert_eq!(gate.wire_first_input(2), 64);
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assert_eq!(gate.wire_chunks_equal(2, 4), 95);
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}
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#[test]
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fn low_degree() {
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test_low_degree::<CrandallField, _, 4>(SwitchGate::<_, 4>::new_from_config(
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let num_bits = 40;
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let num_chunks = 5;
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test_low_degree::<CrandallField, _, 4>(ComparisonGate::<_, 4>::new_from_config(
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CircuitConfig::large_config(),
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3,
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));
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num_bits,
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num_chunks,
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))
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}
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#[test]
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fn eval_fns() -> Result<()> {
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test_eval_fns::<CrandallField, _, 4>(SwitchGate::<_, 4>::new_from_config(
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let num_bits = 40;
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let num_chunks = 5;
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test_eval_fns::<CrandallField, _, 4>(ComparisonGate::<_, 4>::new_from_config(
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CircuitConfig::large_config(),
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3,
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num_bits,
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num_chunks,
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))
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}
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#[test]
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fn test_gate_constraint() {
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type F = CrandallField;
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type FF = QuarticCrandallField;
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const D: usize = 4;
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const CHUNK_SIZE: usize = 4;
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let num_copies = 3;
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/// Returns the local wires for a switch gate given the inputs and the switch booleans.
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fn get_wires(
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first_inputs: Vec<Vec<F>>,
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second_inputs: Vec<Vec<F>>,
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switch_bools: Vec<bool>,
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) -> Vec<FF> {
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let num_copies = first_inputs.len();
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let mut v = Vec::new();
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for c in 0..num_copies {
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let switch = switch_bools[c];
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let mut first_input_chunk = Vec::with_capacity(CHUNK_SIZE);
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let mut second_input_chunk = Vec::with_capacity(CHUNK_SIZE);
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let mut first_output_chunk = Vec::with_capacity(CHUNK_SIZE);
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let mut second_output_chunk = Vec::with_capacity(CHUNK_SIZE);
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for e in 0..CHUNK_SIZE {
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let first_input = first_inputs[c][e];
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let second_input = second_inputs[c][e];
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let first_output = if switch { second_input } else { first_input };
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let second_output = if switch { first_input } else { second_input };
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first_input_chunk.push(first_input);
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second_input_chunk.push(second_input);
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first_output_chunk.push(first_output);
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second_output_chunk.push(second_output);
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}
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v.append(&mut first_input_chunk);
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v.append(&mut second_input_chunk);
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v.append(&mut first_output_chunk);
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v.append(&mut second_output_chunk);
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v.push(F::from_bool(switch));
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}
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v.iter().map(|&x| x.into()).collect::<Vec<_>>()
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}
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let first_inputs: Vec<Vec<F>> = (0..num_copies).map(|_| F::rand_vec(CHUNK_SIZE)).collect();
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let second_inputs: Vec<Vec<F>> = (0..num_copies).map(|_| F::rand_vec(CHUNK_SIZE)).collect();
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let switch_bools = vec![true, false, true];
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let gate = SwitchGate::<F, D> {
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chunk_bits: CHUNK_SIZE,
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num_copies,
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_phantom: PhantomData,
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};
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let vars = EvaluationVars {
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local_constants: &[],
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local_wires: &get_wires(first_inputs, second_inputs, switch_bools),
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public_inputs_hash: &HashOut::rand(),
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};
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assert!(
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gate.eval_unfiltered(vars).iter().all(|x| x.is_zero()),
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"Gate constraints are not satisfied."
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);
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todo!()
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}
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}
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