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Add num_bits in split_low_high.

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This commit is contained in:
wborgeaud 2021-06-16 08:40:28 +02:00
parent ab7e2381a2
commit 8200bdcedc
2 changed files with 8 additions and 4 deletions
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7
src/fri/recursive_verifier.rs
View File

@ -261,7 +261,8 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
let mut evaluations: Vec<Vec<ExtensionTarget<D>>> = Vec::new();
// TODO: Do we need to range check `x_index` to a target smaller than `p`?
let mut x_index = challenger.get_challenge(self);
x_index = self.split_low_high(x_index, n_log).0;
x_index = self.split_low_high(x_index, n_log, 64).0;
let mut x_index_num_bits = n_log;
let mut domain_size = n;
self.fri_verify_initial_proof(
x_index,
@ -301,7 +302,8 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
};
let mut evals = round_proof.steps[i].evals.clone();
// Insert P(y) into the evaluation vector, since it wasn't included by the prover.
let (low_x_index, high_x_index) = self.split_low_high(x_index, arity_bits);
let (low_x_index, high_x_index) =
self.split_low_high(x_index, arity_bits, x_index_num_bits);
evals = self.insert(low_x_index, e_x, evals);
evaluations.push(evals);
self.verify_merkle_proof(
@ -320,6 +322,7 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
domain_size = next_domain_size;
old_x_index = low_x_index;
x_index = high_x_index;
x_index_num_bits -= arity_bits;
}
let last_evals = evaluations.last().unwrap();

5
src/gadgets/range_check.rs
View File

@ -15,9 +15,10 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
}
/// Returns `(a,b)` such that `x = a + 2^n_log * b` with `a < 2^n_log`.
pub fn split_low_high(&mut self, x: Target, n_log: usize) -> (Target, Target) {
/// `x` is assumed to be range-checked for having `num_bits` bits.
pub fn split_low_high(&mut self, x: Target, n_log: usize, num_bits: usize) -> (Target, Target) {
let low_gate = self.add_gate(BaseSumGate::<2>::new(n_log), vec![]);
let high_gate = self.add_gate(BaseSumGate::<2>::new(64 - n_log), vec![]);
let high_gate = self.add_gate(BaseSumGate::<2>::new(num_bits - n_log), vec![]);
let low = Target::wire(low_gate, BaseSumGate::<2>::WIRE_SUM);
let high = Target::wire(high_gate, BaseSumGate::<2>::WIRE_SUM);
self.add_generator(LowHighGenerator {