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wborgeaud 2022-10-20 19:36:28 +02:00
parent 0a800f8261
commit 77d5c625cd
1 changed files with 1 additions and 1 deletions
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2
evm/src/cpu/kernel/interpreter.rs
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@ -47,7 +47,7 @@ impl InterpreterMemory {
mem mem
} }
fn mload_general(&mut self, context: usize, segment: Segment, offset: usize) -> U256 { fn mload_general(&self, context: usize, segment: Segment, offset: usize) -> U256 {
let value = self.context_memory[context].segments[segment as usize].get(offset); let value = self.context_memory[context].segments[segment as usize].get(offset);
assert!( assert!(
value.bits() <= segment.bit_range(), value.bits() <= segment.bit_range(),