Renaming + Clippy

src/field/extension_field/target.rs

@@ -246,7 +246,7 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
     }
 
     /// Returns `a * b`, where `b` is in the extension field and `a` is in the base field.
-    pub fn scalar_mul_ext(&mut self, a: Target, mut b: ExtensionTarget<D>) -> ExtensionTarget<D> {
+    pub fn scalar_mul_ext(&mut self, a: Target, b: ExtensionTarget<D>) -> ExtensionTarget<D> {
         let a_ext = self.convert_to_ext(a);
         self.mul_extension(a_ext, b)
     }

src/gadgets/insert.rs

@@ -2,7 +2,6 @@ use crate::circuit_builder::CircuitBuilder;
 use crate::field::extension_field::target::ExtensionTarget;
 use crate::field::extension_field::Extendable;
 use crate::target::Target;
-use crate::util::bits_u64;
 
 impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
     /// Inserts a `Target` in a vector at a non-deterministic index. This is done by rotating to the
@@ -12,7 +11,7 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
         &mut self,
         index: Target,
         element: ExtensionTarget<D>,
-        mut v: Vec<ExtensionTarget<D>>,
+        v: Vec<ExtensionTarget<D>>,
     ) -> Vec<ExtensionTarget<D>> {
         let mut v = self.rotate_left(index, &v);
         v.insert(0, element);

src/gadgets/range_check.rs

@@ -50,7 +50,7 @@ impl<F: Field> SimpleGenerator<F> for LowHighGenerator {
     }
 
     fn run_once(&self, witness: &PartialWitness<F>) -> PartialWitness<F> {
-        let mut integer_value = witness.get_target(self.integer).to_canonical_u64();
+        let integer_value = witness.get_target(self.integer).to_canonical_u64();
         let low = integer_value & ((1 << self.n_log) - 1);
         let high = integer_value >> self.n_log;
 

src/gadgets/split_base.rs

@@ -22,13 +22,13 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
         )
     }
 
-    /// Asserts that `x`'s bit representation has at least `trailing_zeros` trailing zeros.
+    /// Asserts that `x`'s big-endian bit representation has at least `trailing_zeros` trailing zeros.
     pub(crate) fn assert_trailing_zeros<const B: usize>(&mut self, x: Target, trailing_zeros: u32) {
         let num_limbs = num_limbs(64, B);
         let num_limbs_to_check = num_limbs_to_check(trailing_zeros, B);
         let limbs = self.split_le_base::<B>(x, num_limbs);
         assert!(
-            num_limbs_to_check < self.config.num_routed_wires,
+            num_limbs_to_check <= self.config.num_routed_wires,
             "Not enough routed wires."
         );
         for i in 0..num_limbs_to_check {

src/gadgets/split_join.rs

@@ -32,29 +32,30 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
         if num_bits == 0 {
             return Vec::new();
         }
-        let num_limbs = self.config.num_routed_wires - BaseSumGate::<2>::START_LIMBS;
-        let k = ceil_div_usize(num_bits, num_limbs);
+        let bits_per_gate = self.config.num_routed_wires - BaseSumGate::<2>::START_LIMBS;
+        let k = ceil_div_usize(num_bits, bits_per_gate);
         let gates = (0..k)
-            .map(|_| self.add_gate_no_constants(BaseSumGate::<2>::new(num_limbs)))
+            .map(|_| self.add_gate_no_constants(BaseSumGate::<2>::new(bits_per_gate)))
             .collect::<Vec<_>>();
 
         let mut bits = Vec::with_capacity(num_bits);
         for &gate in &gates {
             bits.extend(Target::wires_from_range(
                 gate,
-                BaseSumGate::<2>::START_LIMBS..BaseSumGate::<2>::START_LIMBS + num_limbs,
+                BaseSumGate::<2>::START_LIMBS..BaseSumGate::<2>::START_LIMBS + bits_per_gate,
             ));
         }
         bits.drain(num_bits..);
 
         let zero = self.zero();
+        let one = self.one();
         let mut acc = zero;
         for &gate in gates.iter().rev() {
             let sum = Target::wire(gate, BaseSumGate::<2>::WIRE_SUM);
             acc = self.arithmetic(
-                F::from_canonical_usize(1 << num_limbs),
+                F::from_canonical_usize(1 << bits_per_gate),
                 acc,
-                zero,
+                one,
                 F::ONE,
                 sum,
             );
@@ -64,7 +65,7 @@ impl<F: Extendable<D>, const D: usize> CircuitBuilder<F, D> {
         self.add_generator(WireSplitGenerator {
             integer,
             gates,
-            num_limbs,
+            num_limbs: bits_per_gate,
         });
 
         bits

src/gates/base_sum.rs

@@ -11,7 +11,8 @@ use crate::target::Target;
 use crate::vars::{EvaluationTargets, EvaluationVars};
 use crate::witness::PartialWitness;
 
-/// A gate which can sum base B limbs and the reversed limbs.
+/// A gate which can decompose a number into base B little-endian limbs,
+/// and compute the limb-reversed (i.e. big-endian) sum.
 #[derive(Debug)]
 pub struct BaseSumGate<const B: usize> {
     num_limbs: usize,

src/gates/mul_extension.rs

@@ -1,4 +1,3 @@
-use std::convert::TryInto;
 use std::ops::Range;
 
 use crate::circuit_builder::CircuitBuilder;