Add CommonCircuitData to gates deserialization method

This commit is contained in:
Robin Salen 2023-06-28 08:26:38 -04:00
parent b43d6c1d67
commit 47781e4733
No known key found for this signature in database
GPG Key ID: F98FD38F65687358
19 changed files with 65 additions and 43 deletions

View File

@ -64,7 +64,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ArithmeticGate
dst.write_usize(self.num_ops)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_ops = src.read_usize()?;
Ok(Self { num_ops })
}

View File

@ -60,7 +60,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ArithmeticExte
dst.write_usize(self.num_ops)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_ops = src.read_usize()?;
Ok(Self { num_ops })
}

View File

@ -59,7 +59,7 @@ impl<F: RichField + Extendable<D>, const D: usize, const B: usize> Gate<F, D> fo
dst.write_usize(self.num_limbs)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_limbs = src.read_usize()?;
Ok(Self { num_limbs })
}

View File

@ -13,6 +13,7 @@ use crate::hash::hash_types::RichField;
use crate::iop::ext_target::ExtensionTarget;
use crate::iop::generator::WitnessGeneratorRef;
use crate::plonk::circuit_builder::CircuitBuilder;
use crate::plonk::circuit_data::CommonCircuitData;
use crate::plonk::vars::{
EvaluationTargets, EvaluationVars, EvaluationVarsBase, EvaluationVarsBaseBatch,
EvaluationVarsBasePacked,
@ -46,7 +47,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ConstantGate {
dst.write_usize(self.num_consts)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_consts = src.read_usize()?;
Ok(Self { num_consts })
}

View File

@ -176,7 +176,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for CosetInterpola
dst.write_field_vec(&self.barycentric_weights)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let subgroup_bits = src.read_usize()?;
let degree = src.read_usize()?;
let length = src.read_usize()?;
@ -504,7 +504,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F, D>
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let row = src.read_usize()?;
let gate = CosetInterpolationGate::deserialize(src)?;
let gate = CosetInterpolationGate::deserialize(src, _cd)?;
Ok(Self::new(row, gate))
}
}

View File

@ -80,7 +80,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for Exponentiation
dst.write_usize(self.num_power_bits)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_power_bits = src.read_usize()?;
Ok(Self::new(num_power_bits))
}
@ -302,7 +302,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F, D>
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let row = src.read_usize()?;
let gate = ExponentiationGate::deserialize(src)?;
let gate = ExponentiationGate::deserialize(src, _cd)?;
Ok(Self { row, gate })
}
}

View File

@ -19,6 +19,7 @@ use crate::hash::hash_types::RichField;
use crate::iop::ext_target::ExtensionTarget;
use crate::iop::generator::WitnessGeneratorRef;
use crate::plonk::circuit_builder::CircuitBuilder;
use crate::plonk::circuit_data::CommonCircuitData;
use crate::plonk::vars::{
EvaluationTargets, EvaluationVars, EvaluationVarsBase, EvaluationVarsBaseBatch,
};
@ -30,7 +31,7 @@ pub trait Gate<F: RichField + Extendable<D>, const D: usize>: 'static + Send + S
fn serialize(&self, dst: &mut Vec<u8>) -> IoResult<()>;
fn deserialize(src: &mut Buffer) -> IoResult<Self>
fn deserialize(src: &mut Buffer, cd: &CommonCircuitData<F, D>) -> IoResult<Self>
where
Self: Sized;

View File

@ -65,7 +65,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for LookupGate {
dst.write_lut(&self.lut)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_slots = src.read_usize()?;
let lut = src.read_lut()?;

View File

@ -78,7 +78,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for LookupTableGat
dst.write_usize(self.last_lut_row)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_slots = src.read_usize()?;
let lut = src.read_lut()?;
let last_lut_row = src.read_usize()?;

View File

@ -57,7 +57,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for MulExtensionGa
dst.write_usize(self.num_ops)
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let num_ops = src.read_usize()?;
Ok(Self { num_ops })
}

View File

@ -7,6 +7,7 @@ use crate::hash::hash_types::RichField;
use crate::iop::ext_target::ExtensionTarget;
use crate::iop::generator::WitnessGeneratorRef;
use crate::plonk::circuit_builder::CircuitBuilder;
use crate::plonk::circuit_data::CommonCircuitData;
use crate::plonk::vars::{EvaluationTargets, EvaluationVars, EvaluationVarsBaseBatch};
use crate::util::serialization::{Buffer, IoResult};
@ -22,7 +23,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for NoopGate {
Ok(())
}
fn deserialize(_src: &mut Buffer) -> IoResult<Self> {
fn deserialize(_src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
Ok(Self)
}

View File

@ -104,7 +104,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for PoseidonGate<F
Ok(())
}
fn deserialize(_src: &mut Buffer) -> IoResult<Self> {
fn deserialize(_src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
Ok(PoseidonGate::new())
}

View File

@ -123,7 +123,7 @@ impl<F: RichField + Extendable<D> + Poseidon, const D: usize> Gate<F, D> for Pos
Ok(())
}
fn deserialize(_src: &mut Buffer) -> IoResult<Self> {
fn deserialize(_src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
Ok(PoseidonMdsGate::new())
}

View File

@ -11,6 +11,7 @@ use crate::hash::hash_types::RichField;
use crate::iop::ext_target::ExtensionTarget;
use crate::iop::generator::WitnessGeneratorRef;
use crate::plonk::circuit_builder::CircuitBuilder;
use crate::plonk::circuit_data::CommonCircuitData;
use crate::plonk::vars::{
EvaluationTargets, EvaluationVars, EvaluationVarsBase, EvaluationVarsBaseBatch,
EvaluationVarsBasePacked,
@ -35,7 +36,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for PublicInputGat
Ok(())
}
fn deserialize(_src: &mut Buffer) -> IoResult<Self> {
fn deserialize(_src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
Ok(Self)
}

View File

@ -129,7 +129,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for RandomAccessGa
Ok(())
}
fn deserialize(src: &mut Buffer) -> IoResult<Self> {
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let bits = src.read_usize()?;
let num_copies = src.read_usize()?;
let num_extra_constants = src.read_usize()?;
@ -403,7 +403,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F, D>
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let row = src.read_usize()?;
let copy = src.read_usize()?;
let gate = RandomAccessGate::<F, D>::deserialize(src)?;
let gate = RandomAccessGate::<F, D>::deserialize(src, _cd)?;
Ok(Self { row, gate, copy })
}
}

View File

@ -66,7 +66,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ReducingGate<D
Ok(())
}
fn deserialize(src: &mut Buffer) -> IoResult<Self>
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self>
where
Self: Sized,
{
@ -233,7 +233,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F, D> for Red
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let row = src.read_usize()?;
let gate = <ReducingGate<D> as Gate<F, D>>::deserialize(src)?;
let gate = <ReducingGate<D> as Gate<F, D>>::deserialize(src, _cd)?;
Ok(Self { row, gate })
}
}

View File

@ -69,7 +69,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ReducingExtens
Ok(())
}
fn deserialize(src: &mut Buffer) -> IoResult<Self>
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self>
where
Self: Sized,
{
@ -227,7 +227,7 @@ impl<F: RichField + Extendable<D>, const D: usize> SimpleGenerator<F, D> for Red
fn deserialize(src: &mut Buffer, _cd: &CommonCircuitData<F, D>) -> IoResult<Self> {
let row = src.read_usize()?;
let gate = <ReducingExtensionGate<D> as Gate<F, D>>::deserialize(src)?;
let gate = <ReducingExtensionGate<D> as Gate<F, D>>::deserialize(src, _cd)?;
Ok(Self { row, gate })
}
}

View File

@ -2,21 +2,26 @@ use plonky2_field::extension::Extendable;
use crate::gates::gate::GateRef;
use crate::hash::hash_types::RichField;
use crate::plonk::circuit_data::CommonCircuitData;
use crate::util::serialization::{Buffer, IoResult};
pub trait GateSerializer<F: RichField + Extendable<D>, const D: usize> {
fn read_gate(&self, buf: &mut Buffer) -> IoResult<GateRef<F, D>>;
fn read_gate(
&self,
buf: &mut Buffer,
common: &CommonCircuitData<F, D>,
) -> IoResult<GateRef<F, D>>;
fn write_gate(&self, buf: &mut Vec<u8>, gate: &GateRef<F, D>) -> IoResult<()>;
}
#[macro_export]
macro_rules! read_gate_impl {
($buf:expr, $tag:expr, $($gate_types:ty),+) => {{
($buf:expr, $tag:expr, $common:expr, $($gate_types:ty),+) => {{
let tag = $tag;
let buf = $buf;
let mut i = 0..;
$(if tag == i.next().unwrap() {
let gate = <$gate_types as $crate::gates::gate::Gate<F, D>>::deserialize(buf)?;
let gate = <$gate_types as $crate::gates::gate::Gate<F, D>>::deserialize(buf, $common)?;
Ok($crate::gates::gate::GateRef::<F, D>::new(gate))
} else)*
{
@ -47,9 +52,13 @@ macro_rules! get_gate_tag_impl {
/// this as first argument, followed by all the targeted gates.
macro_rules! impl_gate_serializer {
($target:ty, $($gate_types:ty),+) => {
fn read_gate(&self, buf: &mut $crate::util::serialization::Buffer) -> $crate::util::serialization::IoResult<$crate::gates::gate::GateRef<F, D>> {
fn read_gate(
&self,
buf: &mut $crate::util::serialization::Buffer,
common: &$crate::plonk::circuit_data::CommonCircuitData<F, D>,
) -> $crate::util::serialization::IoResult<$crate::gates::gate::GateRef<F, D>> {
let tag = $crate::util::serialization::Read::read_u32(buf)?;
read_gate_impl!(buf, tag, $($gate_types),+)
read_gate_impl!(buf, tag, common, $($gate_types),+)
}
fn write_gate(&self, buf: &mut Vec<u8>, gate: &$crate::gates::gate::GateRef<F, D>) -> $crate::util::serialization::IoResult<()> {

View File

@ -684,6 +684,7 @@ pub trait Read {
fn read_gate<F: RichField + Extendable<D>, const D: usize>(
&mut self,
gate_serializer: &dyn GateSerializer<F, D>,
common_data: &CommonCircuitData<F, D>,
) -> IoResult<GateRef<F, D>>;
fn read_generator<F: RichField + Extendable<D>, const D: usize>(
@ -743,13 +744,6 @@ pub trait Read {
let config = self.read_circuit_config()?;
let fri_params = self.read_fri_params()?;
let gates_len = self.read_usize()?;
let mut gates = Vec::with_capacity(gates_len);
for _ in 0..gates_len {
let gate = self.read_gate::<F, D>(gate_serializer)?;
gates.push(gate);
}
let selectors_info = self.read_selectors_info()?;
let quotient_degree_factor = self.read_usize()?;
let num_gate_constraints = self.read_usize()?;
@ -770,10 +764,15 @@ pub trait Read {
luts.push(Arc::new(self.read_lut()?));
}
Ok(CommonCircuitData {
let gates_len = self.read_usize()?;
let mut gates = Vec::with_capacity(gates_len);
// We construct the common data without gates first,
// to pass it as argument when reading the gates.
let mut cd = CommonCircuitData {
config,
fri_params,
gates,
gates: vec![],
selectors_info,
quotient_degree_factor,
num_gate_constraints,
@ -784,7 +783,16 @@ pub trait Read {
num_lookup_polys,
num_lookup_selectors,
luts,
})
};
for _ in 0..gates_len {
let gate = self.read_gate::<F, D>(gate_serializer, &cd)?;
gates.push(gate);
}
cd.gates = gates;
Ok(cd)
}
fn read_circuit_data<
@ -1757,11 +1765,6 @@ pub trait Write {
self.write_circuit_config(config)?;
self.write_fri_params(fri_params)?;
self.write_usize(gates.len())?;
for gate in gates.iter() {
self.write_gate::<F, D>(gate, gate_serializer)?;
}
self.write_selectors_info(selectors_info)?;
self.write_usize(*quotient_degree_factor)?;
self.write_usize(*num_gate_constraints)?;
@ -1780,6 +1783,11 @@ pub trait Write {
self.write_lut(lut)?;
}
self.write_usize(gates.len())?;
for gate in gates.iter() {
self.write_gate::<F, D>(gate, gate_serializer)?;
}
Ok(())
}
@ -2178,8 +2186,9 @@ impl<'a> Read for Buffer<'a> {
fn read_gate<F: RichField + Extendable<D>, const D: usize>(
&mut self,
gate_serializer: &dyn GateSerializer<F, D>,
common_data: &CommonCircuitData<F, D>,
) -> IoResult<GateRef<F, D>> {
gate_serializer.read_gate(self)
gate_serializer.read_gate(self, common_data)
}
fn read_generator<F: RichField + Extendable<D>, const D: usize>(