add "test vectors" for gate constraints, to help debugging

plonky2/src/gates/arithmetic_extension.rs

@@ -87,7 +87,13 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for ArithmeticExte
             let computed_output =
                 (multiplicand_0 * multiplicand_1).scalar_mul(const_0) + addend.scalar_mul(const_1);
 
-            constraints.extend((output - computed_output).to_basefield_array());
+            // constraints.extend((output - computed_output).to_basefield_array());
+            let diff     = output - computed_output;
+            let base_arr = diff.to_basefield_array();
+            // println!("mult_0 = {:?}",multiplicand_0);
+            // println!("diff     = {:?}",diff);
+            // println!("base_arr = {:?}",base_arr);
+            constraints.extend(base_arr);
         }
 
         constraints

plonky2/src/gates/coset_interpolation.rs

@@ -86,6 +86,13 @@ impl<F: RichField + Extendable<D>, const D: usize> CosetInterpolationGate<F, D>
                 .map(|x| (x, F::ZERO))
                 .collect::<Vec<_>>(),
         );
+ 
+        // println!("subgroup_bits   = {}",subgroup_bits);
+        // println!("max_degree      = {}",max_degree);
+        // println!("n_points        = {}",n_points);
+        // println!("n_intermediates = {}",n_intermediates);
+        // println!("degree          = {}",degree);
+        // println!("barycentric_weights = {:?}",barycentric_weights);
 
         Self {
             subgroup_bits,
@@ -228,6 +235,8 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for CosetInterpola
             ExtensionAlgebra::one(),
         );
 
+        // println!("self.degree = {}",self.degree());
+
         for i in 0..self.num_intermediates() {
             let intermediate_eval = vars.get_local_ext_algebra(self.wires_intermediate_eval(i));
             let intermediate_prod = vars.get_local_ext_algebra(self.wires_intermediate_prod(i));
@@ -236,6 +245,7 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for CosetInterpola
 
             let start_index = 1 + (self.degree() - 1) * (i + 1);
             let end_index = (start_index + self.degree() - 1).min(self.num_points());
+            // println!("(start,end) = ({},{})",start_index,end_index);
             (computed_eval, computed_prod) = partial_interpolate_ext_algebra(
                 &domain[start_index..end_index],
                 &values[start_index..end_index],
@@ -877,3 +887,4 @@ mod tests {
         assert_eq!(gate.num_constraints(), 4);
     }
 }
+

plonky2/src/gates/mod.rs

@@ -43,6 +43,7 @@ pub mod reducing;
 pub mod reducing_extension;
 pub(crate) mod selectors;
 pub mod util;
+pub mod test_gate_constraints;
 
 // Can't use #[cfg(test)] here because it needs to be visible to other crates.
 // See https://github.com/rust-lang/cargo/issues/8379

plonky2/src/gates/multiplication_extension.rs

@@ -81,7 +81,10 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for MulExtensionGa
             let output = vars.get_local_ext_algebra(Self::wires_ith_output(i));
             let computed_output = (multiplicand_0 * multiplicand_1).scalar_mul(const_0);
 
-            constraints.extend((output - computed_output).to_basefield_array());
+            // constraints.extend((output - computed_output).to_basefield_array());
+            let diff    = output - computed_output;
+            let bae_arr = diff.to_basefield_array();
+            constraints.extend(bae_arr);
         }
 
         constraints

plonky2/src/gates/random_access.rs

@@ -148,6 +148,8 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for RandomAccessGa
     fn eval_unfiltered(&self, vars: EvaluationVars<F, D>) -> Vec<F::Extension> {
         let mut constraints = Vec::with_capacity(self.num_constraints());
 
+        // println!("self.routed_wires = {}",self.num_routed_wires() );
+
         for copy in 0..self.num_copies {
             let access_index = vars.local_wires[self.wire_access_index(copy)];
             let mut list_items = (0..self.vec_size())
@@ -158,6 +160,10 @@ impl<F: RichField + Extendable<D>, const D: usize> Gate<F, D> for RandomAccessGa
                 .map(|i| vars.local_wires[self.wire_bit(i, copy)])
                 .collect::<Vec<_>>();
 
+            // for i in 0..self.bits {
+            //   println!("copy = {} | i = {}  ->  wire = {}",copy,i, self.wire_bit(i,copy));
+            // }
+
             // Assert that each bit wire value is indeed boolean.
             for &b in &bits {
                 constraints.push(b * (b - F::Extension::ONE));

plonky2/src/gates/test_gate_constraints.rs

@@ -0,0 +1,114 @@
+
+// used for debugging the constraint equations
+
+use crate::field::extension::{Extendable, FieldExtension};
+use crate::field::types::Field;
+
+use crate::hash::hash_types::{HashOut, RichField};
+
+use crate::plonk::circuit_data::{CircuitConfig};
+use crate::plonk::vars::{EvaluationVars};
+
+use crate::gates::gate::Gate;
+
+use crate::gates::arithmetic_extension::*;
+use crate::gates::base_sum::*;
+use crate::gates::coset_interpolation::*;
+use crate::gates::exponentiation::*;
+use crate::gates::multiplication_extension::*;
+use crate::gates::random_access::*;
+use crate::gates::poseidon::*;
+use crate::gates::poseidon_mds::*;
+use crate::gates::reducing::*;
+use crate::gates::reducing_extension::*;
+
+fn make_fext<F: RichField + Extendable<D>, const D: usize>( x: u64 ) -> F::Extension {
+  let mut vec: [F; D] = [F::ZERO; D];
+  vec[0] = F::from_canonical_u64(x);
+  vec[1] = F::from_canonical_u64(13);
+  F::Extension::from_basefield_array(vec)
+} 
+
+pub fn test_gate_constraints<F: RichField + Extendable<D>, const D: usize>() {
+
+  // create some fixed evaluation vars
+  let loc_constants = 
+        [ make_fext::<F,D>(666)
+        , make_fext::<F,D>(77) 
+        ];
+  let input_hash = HashOut{ elements: 
+        [ F::from_canonical_u64(101) 
+        , F::from_canonical_u64(102)
+        , F::from_canonical_u64(103)
+        , F::from_canonical_u64(104) 
+        ] };
+  let loc_wires: [F::Extension; 135] = (0..135).map( |i| make_fext::<F,D>(1001 + 71*i) ).collect::<Vec<_>>().try_into().unwrap();
+
+  let vars = EvaluationVars
+        { local_constants:    &loc_constants
+        , local_wires:        &loc_wires    
+        , public_inputs_hash: &input_hash   
+        };
+
+  let circuit_config: CircuitConfig = CircuitConfig::standard_recursion_config();
+
+  println!("\n------------------------------------------------------------------");
+  println!("ArithmeticExtensionGate");
+  let arith_ext_gate: ArithmeticExtensionGate<D> = ArithmeticExtensionGate::new_from_config(&circuit_config);
+  println!("{:?}", arith_ext_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  let base_sum_gate_2: BaseSumGate<2> = BaseSumGate::new(13);
+  let base_sum_gate_3: BaseSumGate<3> = BaseSumGate::new(13);
+  println!("\nBaseSumGate (radix = 2)");
+  println!("{:?}", base_sum_gate_2.eval_unfiltered(vars) );
+  println!("\nBaseSumGate (radix = 3)");
+  println!("{:?}", base_sum_gate_3.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  let coset_gate_3: CosetInterpolationGate<F,D> = CosetInterpolationGate::with_max_degree(3,8);
+  let coset_gate_4: CosetInterpolationGate<F,D> = CosetInterpolationGate::with_max_degree(4,8);
+  let coset_gate_5: CosetInterpolationGate<F,D> = CosetInterpolationGate::with_max_degree(5,8);
+  println!("\nCosetInterpolationGate (num_bits = 3)");
+  println!("{:?}", coset_gate_3.eval_unfiltered(vars) );
+  println!("\nCosetInterpolationGate (num_bits = 4)");
+  println!("{:?}", coset_gate_4.eval_unfiltered(vars) );
+  println!("\nCosetInterpolationGate (num_bits = 5)");
+  println!("{:?}", coset_gate_5.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("ExponentiationGate (13)");
+  let exp_gate: ExponentiationGate<F,D> = ExponentiationGate::new(13);
+  println!("{:?}", exp_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("MulExtensionGate");
+  let mul_ext_gate: MulExtensionGate<D> = MulExtensionGate::new_from_config(&circuit_config);
+  println!("{:?}", mul_ext_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("PosideonGate");
+  let pos_gate: PoseidonGate<F,D> = PoseidonGate::new();
+  println!("{:?}", pos_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("PosideonMdsGate");
+  let mds_gate: PoseidonMdsGate<F,D> = PoseidonMdsGate::new();
+  println!("{:?}", mds_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("RandomAccessGate");
+  let ra_gate: RandomAccessGate<F,D> = RandomAccessGate::new_from_config(&circuit_config, 4);
+  println!("{:?}", ra_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("ReducingGate");
+  let red_gate: ReducingGate<D> = ReducingGate::new(13);
+  println!("{:?}", red_gate.eval_unfiltered(vars) );
+
+  println!("\n------------------------------------------------------------------");
+  println!("ReducingExtensionGate");
+  let red_ext_gate: ReducingExtensionGate<D> = ReducingExtensionGate::new(13);
+  println!("{:?}", red_ext_gate.eval_unfiltered(vars) );
+
+}